what kind of level of performance increase should be expected from the MCM layout of the CPU/GPU, and the edram?
Do we have any idea of the likely bandwidth of the edram, or how much control developers have over how to access it?
i.e can a developer optimise for internal traffic directly between CPU(and cache)-GPU-edram, avoiding hitting main memory as much as possible, and how much could that increase potential performance?
btw, nice topic. Paging Durante, Fafalada and Panajev