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Member
(11-19-2012, 08:48 PM)
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#203
Depends on the game and the developers. Also, the guy you replied to was specifically referring to the 360. The PS3's Cell can probably handling sound resources better than the 360 due to the SPUs, though I'm not sure.
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Member
(11-19-2012, 08:56 PM)
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#204
On a general purpose CPU audio can really clog up the capacity. Racing games in particular are extremely taxing on the sound. A single car uses a multitude of "voices" at any time, wich multiplies with each car on track. |
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Member
(11-19-2012, 09:01 PM)
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#206
Wait till you see what Durango uses, if the rumors turn out to be true.
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MrArseFace
(11-19-2012, 09:01 PM)
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#207
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Member
(11-19-2012, 09:03 PM)
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#208
Yeah, I'm shaking my head at those rumors. If this turns out true, I wonder how much Sony will reserve. |
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Member
(11-19-2012, 09:12 PM)
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#209
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Member
(11-19-2012, 09:23 PM)
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#213
Yes, but if Sony or MS went the DDR3 route as well, increasing the amount of RAM also allows them to use a wider bus and increase overall bandwidth, and thus performance, even if the total amount/amount reserved for apps seem like overkill. If Nintendo had relented a little bit and used 8 RAM chips, like the original 360, instead of the 4 they went with to cut costs, a 128-bit bus would have been possible and we wouldn't be having this discussion right now. I fully expect MS and Sony to go with a bunch of RAM chips next gen. Like 12 perhaps. Edit: Responded to the correct post this time. :)
Last edited by Fourth Storm; 11-19-2012 at 09:34 PM.
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MrArseFace
(11-19-2012, 09:28 PM)
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#214
Conversely if you calibrate for full range (eg a computer monitor) then playing a bluray on it would have dark grey blacks, and light grey whites. (Unless you have a PC with software bluray player set to compensate for that) I agree it seems an odd restriction, but its the standard. Just like the weird way some TVs still overscan on a 1080p input. That's just nuts there aren't broadcasts at that resolution, just display it 1:1 by default for goodness sake.
Last edited by mrklaw; 11-19-2012 at 09:40 PM.
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Member
(11-20-2012, 02:39 AM)
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#216
Just because one game used a core on the 360 for something like 300 sounds at a time does not mean a damn thing for most games. "general purpose CPU"s are perfectly fine to process audio, the Cell does not have some big advantage (other than the fact it has around double the cores of the 360). |
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Member
(11-20-2012, 02:43 AM)
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#217
Cell SPUs are built to be super high performance data stream processors and have a lot in common with a DSP.
Last edited by Margalis; 11-20-2012 at 02:46 AM.
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Member
(11-20-2012, 02:44 AM)
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#218
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Member
(11-20-2012, 02:48 AM)
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#220
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(11-20-2012, 02:52 AM)
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#221
It seemingly has a GPU of fairly modern featureset with similar capability, more (but slower memory). But it's also fair to say it has drawbacks in comparison to the PS3/360. Mentioned memory bandwidth, and a CPU that lacks any kind of grunt. Culminating in something that should be marginally more powerful, getting there in different ways. |
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Member
(11-20-2012, 03:00 AM)
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#222
Modern soundcards will give you no performance increase what so ever. |
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(11-20-2012, 03:15 AM)
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#223
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Junior Member
(11-20-2012, 05:12 AM)
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#224
Microsoft got sick of shitty sound card drivers BSOD Windows. To help improve OS stability Microsoft changed the APIs for sound processing in Windows Vista to prevent direct hardware sound processing. By stopping sound hardware acceleration, they stopped sound card drivers being able to talk directly to the Windows NT kernel and making API calls to hardware. Doing this elimited the ability for shit house sound drivers (Creative basically) causing Windows computers to blue screen. |
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Member
(11-20-2012, 05:37 AM)
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#225
Still if the rumors are true and MS plans to reserve 3GBs for the OS, that's a huge waste IMO.
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I'm taking it FROM here
(11-20-2012, 06:21 AM)
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#226
It will certainly handle branchy code better than Xenon/Cell per clock. But I really wish we knew how much lower the clock is. |
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(11-20-2012, 11:20 AM)
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#227
Some anonymous dude on Slashdot who claims to be a developer working on Wii U wrote something interesting: According to him, the Wii U CPU has no VMX or VSX units. Instead, Nintendo still uses a SIMD capable FPU with support for paired singles. That makes sense, paired singles would be required for Wii compatibility, so they have to be supported. No surprise here.
But he also wrote that he expected the FPRs (floating point registers) to be 64bit, enough for one double or two singles. 64bit FPRs seem to be standard for all PowerPC cores, no matter whether or not the cores support paired singles (like the 476FP). What he found instead were 96bit registers. I've never heard of a 96bit floating point unit or 96bit registers. I don't even know if there would be a point. Coordinates are typically 96bit I believe, so maybe having one vertex coordinate per register would be beneficial? |
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I'm taking it FROM here
(11-20-2012, 11:23 AM)
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#228
As I understood that post, it's not really 96 bit registers. It's that there are general 64 bit registers, but the paired single instructions don't use those 64 bits, they use 32 bits of that and another extra 32 bit register.
Which does honestly sound confusing to me (I'm used to SIMD architectures that simply pack N X-bit numbers into one N*X bit register). |
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(11-20-2012, 11:30 AM)
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#229
Last edited by wsippel; 11-20-2012 at 11:38 AM.
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Member
(11-20-2012, 12:58 PM)
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#231
edit: Ok, I'm in the middle of a gargantuan build, so let me elaborate a bit. First, a disclaimer: I'm in no way familiar with U-CPU, never touched it, never smelled it, never even removed its heatsink. Yet, there's a single, very useful public bit of info re U-CPU - it's binary compatible with the Gekko/Hollywoord. And that is a well-studied CPU. So back to 750CL (which is IBM's stock name for Gekko, in case somebody missed that). Gekko supports paired singles by utilizing its super-scalar FPU pipeline and through some enhancements to its load/store unit. As every PPC I've had contact with, Gekko features 64bit floating-point registers (FPR), and unsurprisingly, bluntly uses those to store paired singles (as I said in the part before the edit). Now, there's a catch in that - while the organisation of the singles is indeed in the logical high/low spit of the FPR, the CPU _cannot_ interpret doubles as a singles pair, and vice versa. What that means, is that if you load a pair of singles (through its dedicated load instruction, blessed be anonymous cowards) to an FPR, that FPR cannot be treated in a subsequent instruction as if it contained a double - no subsequent math on doubles can use that register as a double - such math will produce unpredictable results. But the restriction does not end there - not only math cannot treat this FPR as a double, but also the store instructions that work with doubles cannot use that register as a double. So if you naively expect that an FPR which contains a singles pair could be stored via a doubles store op - you'd be wrong! You have to use the dedicated paired-singles op to store an FPR containing paired singles. *build done*
Last edited by blu; 11-20-2012 at 04:12 PM.
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Member
(11-20-2012, 01:12 PM)
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#232
Guys, can anyone enlighten me? I would like to know how the capacities and rates we hear left and right influence the quality of the output (framerate, polygons, visual effects). All that I know is that data from the disc is read and ends up being displayed on the screen (yeah, I am that clueless). I have no idea how the components, be it GPU, CPU, RAM, EDRAM, disk player, work with one another to make that happen and how crucial their attributes are. That's what I want to learn (if you could help me).
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Member
(11-20-2012, 06:26 PM)
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#235
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Member
(11-20-2012, 06:55 PM)
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#237
I don't know where else to post this, and it's not worth making a new thread for (plus I don't know if it's old or not), but Panasonic are supplying Wii U's optical discs drives, which are equipped with optical pickup (whatever that is).
http://www.asahi.com/digital/nikkank...211200004.html |
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Junior Member
(11-20-2012, 08:01 PM)
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#238
I have a question about the form factor of the U. Is it just the way things turned out to be because of the parts they used, they used specific parts in order to get a small form factor, or is there is a business case for it? I'm assuming having small form factors results in a higher costs.
Last edited by neoneogaffer; 11-21-2012 at 12:42 AM.
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Member
(11-21-2012, 10:19 AM)
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#239
A gaffer has been wowed by the low power consumption of the WiiU, stating that achieving such efficiency is "a work of art", so I guess this isn't the result of pure luck. I also read (on GAF, lol) that form factor is an important feature in electronics in Japan. More advanced suppositions suggest it is because the Japanese have smaller houses. Do whatever you want with this info. |
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Member
(11-21-2012, 10:37 AM)
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#240
Quote:
? |
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(11-21-2012, 10:38 AM)
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#241
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Member
(11-21-2012, 11:23 AM)
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#242
Apropos, I've been getting some vector math code of mine on the wii lately, but it's more of an exercise in compilers than anything else (it's cross-platform heavily templetized c++ vector code). I'm yet to succeed in persuading the compiler to vectorize it to paired singles, but even in the current scalar state of the code, Gekko performs perfectly in line my expectations, per-clock. Nothing horrible about it ; ) |
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(11-21-2012, 11:27 AM)
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#243
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Member
(11-21-2012, 11:52 AM)
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#244
Hey while my two techies buddy are here, how could you explain that a developer could be circumspect in front of the alleged speed of the Wii U ram after the recent teardowns, stating that they haven't witnessed such performances ? (yes i received some impressions on this affair).
I presume there are two scenarios: 1) All the memory layout is built in a way no developer could suspect that in the middle of its processing from storage to the screens, their code is having a hard time on the RAM, and on the contrary the general performances of all this memory department is good. (the more likely case, with the eDram, etc, as said many times). 2) There is more to it than those rather simple - at least the publicly available ones - analysis (with pictures of the chips, finding of the references, searches on the net), and the bandwidth could be clearly higher than what those innards studying results push us to think it is (so more than those around 12GB/S) ?
Last edited by IdeaMan; 11-21-2012 at 12:48 PM.
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Member
(11-21-2012, 11:53 AM)
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#245
I'm not going to be especially happy until Full Range RGB is patched onto the Wii U. |
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Member
(11-21-2012, 12:01 PM)
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#246
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I'm taking it FROM here
(11-21-2012, 12:42 PM)
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#247
Has anyone done any power measurements in more demanding games than NSMBU?
Taking that measurement of 33 Watt for that (that was after the power supply I believe), I'd estimate (roughly!) that at most the GPU alone will probably pull is 30W. The top-end of Flops/W AMD provides in the Turks line is a bit below 15, so let's go with 15. That would put the best-case Wii U GPU GFLOPS at 450. Which seems to match up pretty well with some of the (lower end) early rumours.
Last edited by Durante; 11-21-2012 at 12:44 PM.
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Member
(11-21-2012, 12:58 PM)
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#248
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Member
(11-21-2012, 01:23 PM)
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#249
eDRAM could have had some benefit if bigger, but then again, Deferred do not like tiling at all. 360 is designed over DX foward rendering, and very optimized for it. Any other renderer will have hard times being optimal to such architecture. But you now, some people made use of hardware fixed functions in other ways than original intended in the past. About WiiU CPU, with such low TDP and 45nm fab process, I wouldn't expect it to be clocked over 2,4Ghz. Even with double L2 cache, it would have hard times struggling with Xenon. Since no heavy architecture improvements are known and it didn't support SMP . Also, even when I think 1GB is overkill for OS, smarthphones needs over 512MB to deliver a smooth experience. I guess WiiU browser is able to open websites desktop version, Am I wrong?
Last edited by dr. apocalipsis; 11-21-2012 at 01:40 PM.
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Member
(11-21-2012, 01:35 PM)
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#250
Historically, the out-of-band component in 3D homogeneous space is called W, i.e. a 3D homogeneous space coordinate/vector is an <x, y, z, w> tuple. Setting W = 1.0 makes the tuple behave as a first-class-citizen coordinate, subject to translations and perspective transforms; setting W = 0.0 makes the tuple immune to translations, which is good for directional vectors. Yes, you can do all that manually, if you have the prior knowledge what type of tuple that is. But aside from a better abstraction model, it can also be an efficiency gain if the hw supports 4-wide ops. For instance, imagine we have a vec3 coordinate we want to get the partial product of with a row/column from a homogeneous transform. We can do that as: res = dot(vec4.xyz, vec3) res += vec4.w or as: res = dot(vec4, vec4(vec3, 1.0)) If the hw does dot4 natively the latter case is preferable over the former, which has a data dependency and is ergo not issuable in the given order - it would stall the pipeline (the dot operation can have arbitrary high latency). The knowledge of the nature of the tuple still allows us to store our original argument as vec3 and not as vec4 though. Last but not least, we have quaternions, which are inherently 4D.
Last edited by blu; 11-23-2012 at 08:15 AM.
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