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Sony patent hints at 3D stacked chips with dual heatsink

Screw 12TF, gimme dual heatsink tech babyyy




 

Gargus

Banned




Seriously Sony, how hard can it be:


That's fine if you're running a standard cpu which is 65c to 80c.

That kind of heatsink and fan is also designed around having at least 1 linear foot of airspace in a average sized case. Meanwhile consoles have airspace measuring a few inches.

Not to mention that wouldn't vent any heat away from the system and just circulate it inside it. In confined spaces you need to draw and from one point, over a passive heat sink and vent it out somewhere else.

So no, that thing would do you no good and probably just allow the chips to overheat.
 

mckmas8808

Ah. Peace and quiet. #ADayWithoutAWoman
well it would be cheaper to be traditional wouldn't it

Yeah, but should that always be the goal?

And from the link above.....

Compared to this traditional 2D architecture, 3D ICs provide several significant advantages:

1. Footprint
Obviously, stacking multiple dies atop one another produces a chip that takes up less space than if those dies were side by side. If the layers are aggressively thinned, a multi-layer 3D-IC is actually no thicker than a traditional 2D chip. The tiny size of 3D-ICs is extremely valuable in miniaturized devices such as cell phones and IoT applications.

2. Speed
Dies stacked in a 3D chip are much closer together than chips on a circuit board. The shorter distances allow electronic signals to travel more quickly from one component to another. 3D stacked devices have shown as much as 5x speed improvement over comparable 2D solutions.

3. Power
Shorter connections automatically require less power, but 3D ICs have another power-saving trick. When an electronic signal travels from one chip to another, it passes through special circuitry that screens out any accidental electrostatic discharge (ESD). These ESD filters consume energy. Signals that travel from one layer to another within a 3D-IC do not require ESD checks. Tests have seen as much as 90% reduction in power consumption.

4. Heterogeneous Integration
Because the layers in a 3D IC are manufactured separately, they can be built differently. This is more important than it might seem! The process in which a die is built affects the behavior of the components on that die: one process makes better capacitors, another makes faster transistors, etc. Even more interesting, the layers may be built at different process nodes – that is, the electronic components may differ in size. This affects the cost, complexity, and performance of each layer. It is even possible to stack layers that are built of different materials. All of these possibilities mean that a 3D IC can combine the best of each process, node, and substrate without compromising some components to accommodate others. In fact, a multi-die stack can contain combinations that are flatly impossible to achieve on a 2D chip.
 
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phil_t98

Gold Member
Yeah, but should that always be the goal?

And from the link above.....

Compared to this traditional 2D architecture, 3D ICs provide several significant advantages:

1. Footprint
Obviously, stacking multiple dies atop one another produces a chip that takes up less space than if those dies were side by side. If the layers are aggressively thinned, a multi-layer 3D-IC is actually no thicker than a traditional 2D chip. The tiny size of 3D-ICs is extremely valuable in miniaturized devices such as cell phones and IoT applications.

2. Speed
Dies stacked in a 3D chip are much closer together than chips on a circuit board. The shorter distances allow electronic signals to travel more quickly from one component to another. 3D stacked devices have shown as much as 5x speed improvement over comparable 2D solutions.

3. Power
Shorter connections automatically require less power, but 3D ICs have another power-saving trick. When an electronic signal travels from one chip to another, it passes through special circuitry that screens out any accidental electrostatic discharge (ESD). These ESD filters consume energy. Signals that travel from one layer to another within a 3D-IC do not require ESD checks. Tests have seen as much as 90% reduction in power consumption.

4. Heterogeneous Integration
Because the layers in a 3D IC are manufactured separately, they can be built differently. This is more important than it might seem! The process in which a die is built affects the behavior of the components on that die: one process makes better capacitors, another makes faster transistors, etc. Even more interesting, the layers may be built at different process nodes – that is, the electronic components may differ in size. This affects the cost, complexity, and performance of each layer. It is even possible to stack layers that are built of different materials. All of these possibilities mean that a 3D IC can combine the best of each process, node, and substrate without compromising some components to accommodate others. In fact, a multi-die stack can contain combinations that are flatly impossible to achieve on a 2D chip.
well the cost is massive isn't it? I mean the super fast SSD isn't gonna be cheat either, this will easy be 450 cost wise or more
 

ZywyPL

Gold Member
That's fine if you're running a standard cpu which is 65c to 80c.

That kind of heatsink and fan is also designed around having at least 1 linear foot of airspace in a average sized case. Meanwhile consoles have airspace measuring a few inches.

Not to mention that wouldn't vent any heat away from the system and just circulate it inside it. In confined spaces you need to draw and from one point, over a passive heat sink and vent it out somewhere else.

So no, that thing would do you no good and probably just allow the chips to overheat.

All of this depends on the case design, which Sony is free to design as they wish. All in all, that's more or less what X1X uses and well, it just works.
 

mckmas8808

Ah. Peace and quiet. #ADayWithoutAWoman
well the cost is massive isn't it? I mean the super fast SSD isn't gonna be cheat either, this will easy be 450 cost wise or more

You're probably right. It's why I think the PS5 will cost $500 and it still may not break even until someone buys 1 game.
 

phil_t98

Gold Member
You're probably right. It's why I think the PS5 will cost $500 and it still may not break even until someone buys 1 game.
I just think with fancy cooking like that comes a cost. Wouldn’t vapour cooling like the X uses be cheaper? New tech comes at a cost I get that but some things don’t need to be reinvented for the sake of reinventing it
 
I just think with fancy cooking like that comes a cost. Wouldn’t vapour cooling like the X uses be cheaper? New tech comes at a cost I get that but some things don’t need to be reinvented for the sake of reinventing it


If we go by Bloomberg the cooling solution doesn't cost a ton more.
 

Nickolaidas

Member
You know something like them bugs bunny cartoon, where he drilled throug the globe and reach the other side of the world.

That only happens because he doesn't take that left turn to Albuquerque.

Anyways, I'd like some help with Cerny's speech ...

The part I need help with is in 34:00, where Cerny talks about the heating issues of the previous consoles and their goals forward.





Can someone tell me if both those 'graphs' are referring to the PS4, or if the second one is referring to the PS5? I have a hard time understanding whether Cerny means that this is fan noise they're targeting for the PS5, or if that was the optimal fan noise they were targeting for the PS4 Pro.

Basically I want to know if Cerny implies that the PS5 will be quieter than the 2nd graph's fans, or if that (2nd graph) is the fan noise they're targeting for the PS5.
 
That only happens because he doesn't take that left turn to Albuquerque.

Anyways, I'd like some help with Cerny's speech ...

The part I need help with is in 34:00, where Cerny talks about the heating issues of the previous consoles and their goals forward.





Can someone tell me if both those 'graphs' are referring to the PS4, or if the second one is referring to the PS5? I have a hard time understanding whether Cerny means that this is fan noise they're targeting for the PS5, or if that was the optimal fan noise they were targeting for the PS4 Pro.

Basically I want to know if Cerny implies that the PS5 will be quieter than the 2nd graph's fans, or if that (2nd graph) is the fan noise they're targeting for the PS5.
Well if you look closely at the images both are PS4s. I think hes saying if you implemented the PS5s tech in the PS4 it would be way less noisy and standard across all systems.
 
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mckmas8808

Ah. Peace and quiet. #ADayWithoutAWoman
I just think with fancy cooking like that comes a cost. Wouldn’t vapour cooling like the X uses be cheaper? New tech comes at a cost I get that but some things don’t need to be reinvented for the sake of reinventing it

Did you read the 4 things that stacking adds? Do you think that's reinventing "just for the sake of it"?
 
Normally you can only cool a chip from the top, the PCB is below it and not worth too much effort cooling, too many layers of material between the hot silicon and bottom of the board.

A 3D stacked chip being relevant to cool from both the top and bottom could mean that within the same size of a console, you can move away substantially more power/heat.

Thanks, appreciate the detailed answer.
 

CrysisFreak

Banned
So explain to someone like me who doesn't know or really care about cooling.
Does this indicate that PS5 may potentially have a strong cooling system?
 

phil_t98

Gold Member
Did you read the 4 things that stacking adds? Do you think that's reinventing "just for the sake of it"?
Ok what are the advantages of it compared to traditional cooking? So let’s put it against vapour cooling or traditional fan cooling? Am curious
 
Ok what are the advantages of it compared to traditional cooking? So let’s put it against vapour cooling or traditional fan cooling? Am curious

Why develop something new if something old is enough?

Sony would be dumb to spend alot researching and developing a new cooling system if the more traditional ones meet their goals for the system.

Just seems like a waste of money to me if there are no benefits.
 

mckmas8808

Ah. Peace and quiet. #ADayWithoutAWoman
Ok what are the advantages of it compared to traditional cooking? So let’s put it against vapour cooling or traditional fan cooling? Am curious

1. Footprint
Obviously, stacking multiple dies atop one another produces a chip that takes up less space than if those dies were side by side
. If the layers are aggressively thinned, a multi-layer 3D-IC is actually no thicker than a traditional 2D chip. The tiny size of 3D-ICs is extremely valuable in miniaturized devices such as cell phones and IoT applications.

2. Speed
Dies stacked in a 3D chip are much closer together than chips on a circuit board. The shorter distances allow electronic signals to travel more quickly from one component to another. 3D stacked devices have shown as much as 5x speed improvement over comparable 2D solutions.

3. Power
Shorter connections automatically require less power, but 3D ICs have another power-saving trick. When an electronic signal travels from one chip to another, it passes through special circuitry that screens out any accidental electrostatic discharge (ESD). These ESD filters consume energy. Signals that travel from one layer to another within a 3D-IC do not require ESD checks. Tests have seen as much as 90% reduction in power consumption.

4. Heterogeneous Integration
Because the layers in a 3D IC are manufactured separately, they can be built differently. This is more important than it might seem! The process in which a die is built affects the behavior of the components on that die: one process makes better capacitors, another makes faster transistors, etc. Even more interesting, the layers may be built at different process nodes – that is, the electronic components may differ in size. This affects the cost, complexity, and performance of each layer. It is even possible to stack layers that are built of different materials. All of these possibilities mean that a 3D IC can combine the best of each process, node, and substrate without compromising some components to accommodate others. In fact, a multi-die stack can contain combinations that are flatly impossible to achieve on a 2D chip.
 

Tripolygon

Member
Ok what are the advantages of it compared to traditional cooking? So let’s put it against vapour cooling or traditional fan cooling? Am curious
I see one obvious advantage. The majority of the heat produced by a chip is because of the movement of data between transistors. The interconnect that connects each transistor is usually at the bottom layer of a chip and traditional cooling systems cool from the top. This patent devices a way to cool from the bottom with a big heatsink as well as cooling from the top as well. If they are stacking memory on the top layer, it provides an effective way to cool the memory on the top layer as well as other parts of the chip in the bottom layer.

This is all just assuming they are using 3D stacking and this patent. I however believe they would use a regular vapor chamber cooling.
 

RaySoft

Member
That only happens because he doesn't take that left turn to Albuquerque.

Anyways, I'd like some help with Cerny's speech ...

The part I need help with is in 34:00, where Cerny talks about the heating issues of the previous consoles and their goals forward.





Can someone tell me if both those 'graphs' are referring to the PS4, or if the second one is referring to the PS5? I have a hard time understanding whether Cerny means that this is fan noise they're targeting for the PS5, or if that was the optimal fan noise they were targeting for the PS4 Pro.

Basically I want to know if Cerny implies that the PS5 will be quieter than the 2nd graph's fans, or if that (2nd graph) is the fan noise they're targeting for the PS5.
He was talking about possible scenarios that could happen if they didn't get the cooling solution right. At the time they designed the cooling solution for the PS4 they couldn't know how much games in 7 years would push the hardware, so if they didn't get it right the machine would sound like God of War on PS4;-) This is why they went with a more dynamic approach for PS5, so the hardware can adjust on a case by case use. (variable frequency)
 

Hawking Radiation

Gold Member
Painted it to better see what is what.

green - PCB
orange - heatsink/heatpipes
blue - main chip with housing

Basically chip is placed not on PCB but on heatplate that heatplate has miniheatpipes coming throught it on other side of pcb where lies heatsink with fins. center of chip is used to cool via heatplate and PCI lanes go around the rim of chip. Consoles don't need a lot of PCI lanes so it is perfectly reasonable that a lot of underside is without PCI lanes unlike something like PC chip. Then there is other heatsink which lies on top of housing with paste in traditional way.

neat design, but i doubt it would poliferate to PC as PC chips have massive amount of PCI lanes and there is simply no space for heatplate. With such setup you can cool chip from two sides which is especially important for 3D stacked chips.

Thanks for posting this.
What does this mean for packaging?

Can we expect a small form factor console or are we looking at a large box like Series X?
 

SonGoku

Member
So probably they will use main chip at 7nm with cpu and gpu and separate chip maybe at 12nm with I/O and cache
I don't think they'll separate I/O from the main die (APU) for performance/latency gains its better to keep it on die. SSD/SRAM though could fit this purpose further reducing latency
It would be awesome if they found a way to put GDDR6 chips on top but that doesn't sound plausible right?
 

yurinka

Member
Does this design mean that there won't be a jet engine fan on top of the APU? I mean, do this mean that they replaced the traditional fan for heatsinks?

If true it would mean that it will be super silent.
Ok what are the advantages of it compared to traditional cooking?


It spreads the heat more efficiently through all the surface so your sausages are cooked better from both sides at the same time, so they get a bit crunchy but tasty and tender, requiring less secret bbq sauce.
 
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Dontero

Banned
I don't think they'll separate I/O from the main die (APU) for performance/latency gains its better to keep it on die. SSD/SRAM though could fit this purpose further reducing latency
It would be awesome if they found a way to put GDDR6 chips on top but that doesn't sound plausible right?

That is how Ryzen3600 operate. They have die for I/O and die for cores.
Stacking cache would actually improve latency not lower it as road to cache would be shorter not longer.

No you can't stack GDDR6 it is simply to big compared to chip.


Thanks for posting this.
What does this mean for packaging?

Can we expect a small form factor console or are we looking at a large box like Series X?

Housing is metal box containing chip to better conduct heat and protect chip from being broken by pressure of heatsink.

Dual cooling solution here means that they have issues with heat dissipation and it means it won't be slim console. IT might be possible that it will be bigger volume wise than SEX. As heat generated is not linear but squared when you increase frequency. It has lower CU amount so this is kind of offset but from my experience a lot of slower clocked CU should run a lot cooler than fewer but higher clocked.
 
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yurinka

Member
Thanks, Captain Obvious. PS5 is a console, not a tower.

It isn't a cheesecake. #PS5

Remember. The PS5, with its last minute overclock in attempt to reduce the gap between the XSX will overheat. 10.2 TF will not be reached.
Poor FUD attempt.

The whole console hardware architecture is designed since the start around that overclocking boost while at the same time to control overheat better than in traditional systems by keeping always the same temperature, by controlling the frequency boost depending on CPU & GPU activity instead of temperature and applying an innovative cooling system that we saw patented in the OP.

These are key main architecture design choices, not last minute tweaks.
 
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I don't understand why this patent is floating around again, it was already discussed and determined to be a big nothingburger.

It has nothing to do with 3d stacked chips. The reason for the design is spelled out for you in the first paragraph... It simply allows them freedom to place components on either side of a circuit board to aid in laying out components how they like. So now a Blu Ray reader can slot just above the APU.. in theory. Or if you need additional cooling, yea you could put a 2nd heatsink on top if you like, but the patent doesn't say anything about that.

Basically, this should let them more tightly pack components together.

That is, if the device being cooled doesn't need as good of cooling as a traditional direct heatsink... because I'm telling you, this design will be considerably less efficient at cooling because the heat has to transfer through the PCB, which is itself a thermal resistance... which means some heat will get trapped in the walls of the conduits instead of sinking directly into a thermal paste/pad.
 
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SonGoku

Member
This wouldn't be the first Sony console to employ 3D stacking. PSP also used 3D stacking and it is used all the time for NAND manufacturing.
PSVITA too afaik
That is how Ryzen3600 operate. They have die for I/O and die for cores.
Stacking cache would actually improve latency not lower it as road to cache would be shorter not longer.
Im aware but they do so at a latency cost, besides the I/O isn't only used for CPU here its for the GPU as well. It won't be separate
 
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