Ok so you admit you have no idea what WiiU's eDRAM bandwidth is but you're happy to claim it as fact that it has a "low memory bandwidth".
Happy to admit i do not know the Wii U's eDRAM bandwidth.
To explain how i came to form my view about its likely bandwidth:
We know the Wii U's eDRAM is intergrated directly into the GPU die. Do you agree with this?
Also to clarify. When i say the eDRAM is slower then the Xbox 360's, i'm only refering to bandwidth between the eDRAM and the ROPs.
Why do i believe the above?
The Xbox 360's eDRAM and ROPs were tied together into one piece of silicon. Being on the same die this allowed Microsoft to create an incredibly high bandwidth between the eDRAM and ROPs directly. The bandwidth was aroun 256 gigabytes per second between the eDRAM and ROPs. Even by today's standards that's crazy. The logic behind this was to allow easy frame and z buffering, anti alisasing, and a few other things. That high bandwidth to the ROPs allowed these tasks to be done almost penalty free for developers.
Outside of the ROPs however, the rest of Xenos can't achieve any where near level of bandwidth from the eDRAM. From memory the bandwidth from eDRAM to Xenos is around 32 gigabytes per second. The eDRAM in the Xbox 360 really was geared for the afformentioned frame buffering, z buffering, aliasing etc. It had very limited use and versatility and was geared to primarily feed the ROPs.
The Wii U's eDRAM however seems to be more general purpose, in line with the MEM1 pools in the Wii and Gamecube. The Wii U's eDRAM is not just going to be for frame buffer, z buffer, etc, thus why is 3.2x the size of the eDRAM in the Xbox 360. It's also designed to provide developers with a small capcity but incredibly high bandwidth and low lantecy memory pool to do whatever they want with. Developers can use the remaining memory left over to store anything from textures, GPGPU data, through to a cache to reduce I/O to the MEM2 pool and CPU.
Why do i believe the bus is sub 100 gigabytes per second?
With Nintendo opting to intergrate the Wii U's eDRAM directly into the GPU's die, that fabrication process is going to be a lot more complex and expensive then the Xbox 360's Xenon GPU. Heck its complex by any standard.
I cannot see AMD or Nintendo opting to split the eDRAM pool to provide one portion with a very high >200gbps to the ROPs, and another slower memory bus to the remainder of the GPU. That would be incredibly freaking expensive and complex bus design for any chip yet alone a GPU. As such i believe it would be far cheaper and easier for Nintendo and AMD to intergerate single bus between the eDRAM and GPU. That bus is shared between the ROPs and the remainder of the GPU. This bus would be faster then the 32 gigabytes per second of Xenos to its eDRAM, but slower then the 256 gigabytes per second of the Xbox 360's ROPs - eDRAM. The Wii U's eDRAM speed lies somewhere in the middle.
So that's my logic.
Wii U eDRAM is not split, its a single 32 megabyte block. It acts more like the Gamecube and Wii's MEM1 with developers being able to store what ever they want in the available space left after z buffering and frame buffering. The Wii U's eDRAM has a slower data throughput to its ROPs then the XBox 360s, but on the reverse the eDRAM is larger, more versatile, and throughput between the remainder of GPU and eDRAM is significantly higher then both the Xbox 360's eDRAM and its GDDR5.