I must have missed the memo. What's wrong with the Exynos in the S4?
nothing. but that is 6 month old tech now!
My understanding is that there is an issue with the cache coherency bus within the Exynos 5.
The URL is of the system architechture of a Big.Little presentation, The CCI-4000 interconnect on the Exynos 5 is broken completely. Traditionally Big.Little should be able to run in any of the following 3 modes:
a) All programs running on the little cluster of cores - Cortex A7
b) All programs running on the big cluster of cores - Cortex A15
c) Some programs running on the big cluster and some programs running on the little cluster
As the CCI-4000 is broken mode C does not work at all, secondly when you want to switch between mode A and mode B instead of all that being done on the processor itself via the CCI what instead happens is all the data gets pushed out to RAM and then read back in again incurring a performance and power penalty.
Long story short Samsungs Big.Little implementation is FUBAR.
Anand discusses it in his podcast here
http://www.anandtech.com/show/7114/the-anandtech-podcast-episode-21
Forward to 1hr 12min.