Not in anyway surprising. Actually, just how nice looking the best games look is surprising. But that's not saying much really. This news is no surprise. This is the same philosophy from the Wii. The Wii U is in every way the Wii's sequel.
That's plainly false and you know it.
The Wii had a 19 mm^2 CPU and a 79 mm^2 GPU/DSP/ARM/Northbridge die.
The WiiU has a 27,73 mm^2 CPU and a 146,48 mm^2 GPU/DSP/ARM/Northbridge die.
The GC had a 43 mm^2 CPU and a 110 mm^2 GPU/DSP/ARM/Northbridge die.
In terms of die area the chips are clearly much more than they were on the Wii, in fact, their combined area is bigger on the WiiU than on the GC.
Regarding the specs listed in this thread, I have two questions:
- Those numbers are known for sure, or they are deduced from the "downgrade" information you (bgassassin) had?
- Even excluding the 40 mm^2 of the 32MB of eDram, we are still left with 106 mm^2 of GPU area (the 2+1 MB of eDRAM/eSRAM occupy between 10 and 12mm^2, so let's be "generous" and say it goes down to 90mm^2 of pure GPU area without any memory on it).
If we compare with the HD4000 released in 2009, at a 40nm fabrication process it had a 640:32:16 core with Double Precision (I doubt the WiiU has that, which would mean smaller shader processors for the same single precision FLOP performance), a GDDR5 controller (which for what I know, it's bigger than a standard DDR3 controller like the one used on the WiiU) and a total area of 137 mm^2.
There's only one explanation to me for why Nintendo couldn't even reach a 320:16:9 core with (more than) 90mm^2 of pure GPU area, and that explanation is that the GPU is
at least fabricated at 55nm and not the 40nm we suspected.
Now, is it possible to put 32MB of eDRAM in 40mm^2 with a transistor size of 55nm?
To compare apples to apples, the GC 2+1 MB of eDRAM/eSRAM occupied a bit less than 1/3 of the total area of the chip (110 mm^2). 110/3 = 36,6 mm^2.
Since it's "a bit less" until someone measures it with the die shot, let's suppose a 30mm^2 figure at 180nm.
Now even going by the lowest figure (10 mm^2) for the smaller banks of memory, it seems pretty obvious that this console isn't fabricated at 40nm (30mm^2 at 180nm would occupy less than 1,875 mm^2 at 40nm).
In fact, going by the figures, I would say
a 90nm fabrication process is the most probable scenario. Is that even possible?
