#### tusharngf

##### Member

- Oct 25, 2017

- 594

- 1,353

- 510

AMD ready their next-generation RDNA 3 lineup and it looks like the flagship Navi 31 GPU for the upcoming Radeon RX lineup has been taped out today. A tweet from leaker, Greymon55, suggests that AMD has taped out its flagship graphics chip for 2022.

A preliminary block diagram of AMD's next-gen RDNA 3 based Navi 31 GPU that will power the flagship Radeon RX 7900 XT graphics card.

The Navi 31 GPU configuration shown here features two GCD's (Graphics Core Die) and a single MCD (Multi-Cache Die). Each GCD has 3 Shader Engines (6 in total) and each Shader Engine has 2 Shader Arrays (2 per SE / 6 per GCD / 12 in total). Each Shader Array is composed of 5 WGPs (10 per SE / 30 per GCD / 60 in total) and each WGP features 8 SIMD32 units with 32 ALUs (40 SIMD32 per SA / 80 per SE / 240 per GCD / 480 in total). These SIMD32 units combine to make up 7,680 cores per GCD and 15,360 cores in total.

The Navi 31 (RDNA 3) MCD will be linked to the dual GCD's via a next-generation Infinity Fabric interconnect and feature 256-512 MB of Infinity Cache. Each GPU should also feature 4 memory connect links (32-bit). That's a total of 8 32-bit memory controllers for a 256-bit bus interface.

Source: AMD's Flagship Navi 31 GPU Based on Next-Gen RDNA 3 Architecture Has Reportedly Been Taped Out (wccftech.com)

A preliminary block diagram of AMD's next-gen RDNA 3 based Navi 31 GPU that will power the flagship Radeon RX 7900 XT graphics card.

The Navi 31 GPU configuration shown here features two GCD's (Graphics Core Die) and a single MCD (Multi-Cache Die). Each GCD has 3 Shader Engines (6 in total) and each Shader Engine has 2 Shader Arrays (2 per SE / 6 per GCD / 12 in total). Each Shader Array is composed of 5 WGPs (10 per SE / 30 per GCD / 60 in total) and each WGP features 8 SIMD32 units with 32 ALUs (40 SIMD32 per SA / 80 per SE / 240 per GCD / 480 in total). These SIMD32 units combine to make up 7,680 cores per GCD and 15,360 cores in total.

The Navi 31 (RDNA 3) MCD will be linked to the dual GCD's via a next-generation Infinity Fabric interconnect and feature 256-512 MB of Infinity Cache. Each GPU should also feature 4 memory connect links (32-bit). That's a total of 8 32-bit memory controllers for a 256-bit bus interface.

## AMD RDNA 3 Navi 3X GPU Configurations (Preliminary)

GPU Name | Navi 21 | Navi 33 | Navi 32 | Navi 31 |
---|---|---|---|---|

GPU Process | 7nm | 6nm | 5nm/6nm | 5nm/6nm |

GPU Package | Monolithic | Monolithic | MCM | MCM |

Shader Engines | 4 | 2 | 4 (2 per GCD) | 6 (3 per GCD) |

GPU WGPs | 40 | 20 | 40 (20 per GCD) | 60 (30 per GCD) |

SPs Per WGP | 128 | 256 | 256 | 256 |

Compute Units (Per Die) | 80 | 40 | 80 160 (Total) | 120 240 (Total) |

Cores (Per Die) | 5120 | 5120 | 5120 | 7689 |

Cores (Total) | 5120 | 5120 | 10240 | 15360 |

Memory Bus | 256-bit | 128-bit | 192-bit | 256-bit |

Memory Type | GDDR6 | GDDR6 | GDDR6 | GDDR6 |

Infinity Cache | 128 MB | 256 MB | 384 MB | 512 MB |

Flagship SKU | Radeon RX 6900 XTX | Radeon RX 7700 XT? | Radeon RX 7800 XT? | Radeon RX 7900 XT? |

TBP | 330W | ~200W | ~300W | ~400W |

Launch | Q4 2020 | Q4 2021? | Q4 2021? | Q4 2021? |

Source: AMD's Flagship Navi 31 GPU Based on Next-Gen RDNA 3 Architecture Has Reportedly Been Taped Out (wccftech.com)

Last edited: