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Digital Foundry: If Xbox One X is $500 - How much will next-gen consoles cost?

I went through GloFlo's press release and TSMc's conference call summary.
The great news is that 7nm EUV will be ready in 2019, consumer products will be in store in 2020 using it.
EUV will save clients money on the die, 10% performance boost over 7nm, 7nm in return offers a 40% performance boost over 16nm.

There's some fab war going on, everyone is aggressively trying get out of the gate with the next node.
GloFlo even has a working sample of a 5nm EUV chip using silicon nanosheet, seems they're the one leading the pack Atm.
Which is great because they are best buddies with AMD.

All in all 2020 is looking to be the year PS5 launches. Everything points to that.
 
Who said that HBM increases the APU/GPU die size? You can still have HBM with a smaller die size. Fury X has 4096 ALUs and it's a 28nm chip. That's why it's so big. HBM has nothing to do with it. We're talking about separate dies, not eSRAM which is embedded into the same die.

There are also 600mm2 chips with GDDR memory. It's mainly the ALU count that dictates how big it is. The memory controller is only a small part of it.

AFAIK, it's the interposer that costs a lot of money to manufacture... there are no economies of scale (yet). If they manage to solve this issue, HBM will be the best fit for small & powerful console boxes. Don't forget that GDDR wasn't cheap either when it was first introduced back in 2004.
HBM stacks DRAM dies over the APU die increasing the size of the same.

Die size is probably the wrong word here but instead it increase the chip size.
 
I went through GloFlo's press release and TSMc's conference call summary.
The great news is that 7nm EUV will be ready in 2019, consumer products will be in store in 2020 using it.
EUV will save clients money on the die, 10% performance boost over 7nm, 7nm in return offers a 40% performance boost over 16nm.

There's some fab war going on, everyone is aggressively trying get out of the gate with the next node.
GloFlo even has a working sample of a 5nm EUV chip using silicon nanosheet, seems they're the one leading the pack Atm.
Which is great because they are best buddies with AMD.

All in all 2020 is looking to be the year PS5 launches. Everything points to that.
Another long Gen....
 
HBM stacks DRAM dies over the APU die increasing the size of the same.

Die size is probably the wrong word here but instead it increase the chip size.
I think you got it wrong, there are no memory dies stacked over the GPU die:

amdfijidie.jpg


The X chip package has lots of empty space where HBM could fit, as long as they rearrange the resistors that surround the chip:

project-scorpio-cpu.jpg


Also, HBM is supposed to be low-power (low frequency, huge bus width) compared to GDDR, so plenty of savings there as well. They can increase the TDP of the APU/GPU chip (higher clocks), instead of feeding power-hungry GDDR memory modules.
 
400$ won't buy otherwise but i am waiting for the revision with more space next time anyway so by then it's probably sub 350$ or 300$.
 
I think you got it wrong, there are no memory dies stacked over the GPU die:

amdfijidie.jpg


The X chip package has lots of empty space where HBM could fit, as long as they rearrange the resistors that surround the chip:

project-scorpio-cpu.jpg


Also, HBM is supposed to be low-power (low frequency, huge bus width) compared to GDDR, so plenty of savings there as well. They can increase the TDP of the APU/GPU chip (higher clocks), instead of feeding power-hungry GDDR memory modules.
Add HBM to XB1X chip will increase it... four DRAM dies plus communication parts will be added on the sides of the chip... it is about 35mm2 each DRAM die... you need 4 of these plus the communication parts added.

That is how HBM works.

What you see in the pic of the chip is not the size of it... it is the size of the package... the chip is only the black part... this part increases with HBM.

Edit - This is pic shows how HBM is added to the chip size... the greens and oranges colors are added to the size of the chip.

11286625_10153897202717788_737087796_o.jpg
 
I went through GloFlo's press release and TSMc's conference call summary.
The great news is that 7nm EUV will be ready in 2019, consumer products will be in store in 2020 using it.
EUV will save clients money on the die, 10% performance boost over 7nm, 7nm in return offers a 40% performance boost over 16nm.

There's some fab war going on, everyone is aggressively trying get out of the gate with the next node.
GloFlo even has a working sample of a 5nm EUV chip using silicon nanosheet, seems they're the one leading the pack Atm.
Which is great because they are best buddies with AMD.

All in all 2020 is looking to be the year PS5 launches. Everything points to that.

I'm unfamiliar with the EUV term. What does it mean?

Also, it sounds like non-EUV 7nm will be ready before then. That seems like a good enough boost for next gen, then using EUV for a slim model
 
I went through GloFlo's press release and TSMc's conference call summary.
The great news is that 7nm EUV will be ready in 2019, consumer products will be in store in 2020 using it.
EUV will save clients money on the die, 10% performance boost over 7nm, 7nm in return offers a 40% performance boost over 16nm.

There's some fab war going on, everyone is aggressively trying get out of the gate with the next node.
GloFlo even has a working sample of a 5nm EUV chip using silicon nanosheet, seems they're the one leading the pack Atm.
Which is great because they are best buddies with AMD.

All in all 2020 is looking to be the year PS5 launches. Everything points to that.

Semi Custom APU's unlikely to be first thing off the press. 40% performance boost means 40% increased density, but if you add Zen CPU, that is going to take a significant amount of die space vs Jaguar. If you have 16 GB or more of GDDR6 or HBM, that will be more heat. I still think a 12 TF APU with Zen and more memory density being the first semi Custom chip off the press is supremely optimistic, and even so, that is going to require an expensive cooling solution like the Xbox One X to work. Is a 12 TF console really next gen, or just another iteration of current gen?
 
Another long Gen....
Mass production, why launch in 2019 when you can save money a year later.
It just helps with a 399 price point, 7nm will be mature then, more performance gains as well.
By then GDDR6 prices might be more stable compared to 2018, HMB3/LCHBM might be a viable option even.
PS5 slim will most likely be on 5nm/euv/silicon nanosheet,same with a PS5 pro.
 
Add HBM to XB1X chip will increase it... four DRAM dies plus communication parts will be added on the sides of the chip... it is about 35mm2 each DRAM die... you need 4 of these plus the communication parts added.
Increase what? Power consumption?

http://images.anandtech.com/doci/9266/HBM_10_Energy.png
http://images.anandtech.com/doci/9266/HBM_11_RAM_Size.png
http://www.anandtech.com/show/9266/amd-hbm-deep-dive/4
https://www.extremetech.com/extreme...-huge-size-advantage-of-hbm-over-gddr5-memory

If there's any hope of having 64GB of RAM on the PS5 (I know 64GB sounds far-fetched right now, just like 8GB was sci-fi back in 2011), HBM is the way to go (as long as it's cost-effective by then).

What you see in the pic of the chip is not the size of it... it is the size of the package... the chip is only the black part... this part increases with HBM.
You still haven't explained why HBM increases the black part.

Edit - This is pic shows how HBM is added to the chip size... the greens and oranges colors are added to the size of the chip.

11286625_10153897202717788_737087796_o.jpg
Hawaii has 2816 ALUs. Fiji has 4096 ALUs. Both are 28nm chips. Totally different things. I fail to see the correlation with HBM increasing the die size (purple part).

Here's the source if anyone wants to check it out: http://wccftech.com/amd-fiji-die-reconstructed-hbms-huge-gpu-uncovered/

The total package size is not bigger than the equivalent GDDR solution.

The savings are pretty clear to me, without sacrificing the GPU size/ALU count:

hbm-area.jpg


You can't really remove GDDR from the equation (not to mention the extra VRMs that are required)... it all adds up.
 
Just a hint or speculation.

Mobile Zen probably won't have SMT... makes no sense to have this feature that is more focused in workstation tasks and in most games affect negatively the performance.

I expected a 8-core mobile Zen on PS5 without SMT. That will be a huge increase over Jaguar.


The biggest issue with HBM is the same MS found with eSRAM... you need to trade off size to allow these memory chip on die.

In simple terms you need to have a small GPU part to accommodate HBM chips on die... that is why I don't believe HBM will ever be a thing for consoles where you need to use the max possible of the die size to increase GPU units.

BTW my especulativos is 16GB GDDR6 for PS5.
Bro 16GB isn't enough ram for next gen. Subtract 4GB for the OS, leaves just 12 to be shared for the CPU/GPU. They need at least 32GB. Next gen will last from 2021 till probably the end of that decade. Also it's kinda funny to me how your just religiously opposed to HBM3. I wounder what will bandwidth requirements will be like in 2025+ when next gen is in full swing :)
 
Going back to the OP's question: they will cost 399, such a competitive price when they'll come out in two years and you already paid 500 or 400 for the mid-gen refresh.
 
Going back to the OP's question: they will cost 399, such a competitive price when they'll come out in two years and you already paid 500 or 400 for the mid-gen refresh.
You do realize that $399 the launch price of the Xbox 360 back in 2005, is basically $499 in 2020/2021 when PS5 releases considering inflation.
 
Bro 16GB isn't enough ram for next gen. Subtract 4GB for the OS, leaves just 12 to be shared for the CPU/GPU. They need at least 32GB. Next gen will last from 2021 till probably the end of that decade. Also it's kinda funny to me how your just religiously opposed to HBM3. I wounder what will bandwidth requirements will be like in 2025+ when next gen is in full swing :)

Next gen, the amount of ram will matter much less than the bandwidth that RAM has. We will likely get 16 to 24GB of RAM in those next consoles(i'm guessing 16), but the bandwidth at that time has the potential to be 800+GB/s, which is significant leap forward.
 
Increase what? Power consumption?

http://images.anandtech.com/doci/9266/HBM_10_Energy.png
http://images.anandtech.com/doci/9266/HBM_11_RAM_Size.png
http://www.anandtech.com/show/9266/amd-hbm-deep-dive/4
https://www.extremetech.com/extreme...-huge-size-advantage-of-hbm-over-gddr5-memory

If there's any hope of having 64GB of RAM on the PS5 (I know 64GB sounds far-fetched right now, just like 8GB was sci-fi back in 2011), HBM is the way to go (as long as it's cost-effective by then).


You still haven't explained why HBM increases the black part.


Hawaii has 2816 ALUs. Fiji has 4096 ALUs. Both are 28nm chips. Totally different things. I fail to see the correlation with HBM increasing the die size (purple part).

Here's the source if anyone wants to check it out: http://wccftech.com/amd-fiji-die-reconstructed-hbms-huge-gpu-uncovered/

The total package size is not bigger than the equivalent GDDR solution.

The savings are pretty clear to me, without sacrificing the GPU size/ALU count:

hbm-area.jpg


You can't really remove GDDR from the equation (not to mention the extra VRMs that are required)... it all adds up.
Your own examples shows the chip is bigger.

GDRR6 is not part of the chip... it is outside the chip on the PCB and it didn't affect the chip production at all. HBM is produced/stacked inside the chip and it add complexity and size to the chip...

Let's think Sony wants a 400mm2 chip for PS5:

[NoHBM]
- 100mm2 for CPU
- 250mm2 for GPU
- 50mm2 others

[HBM]
- 100mm2 for CPU
- 100mm2 for HBM
- 150mm2 for GPU
- 50mm2 others

See? You have to put 100mm2 to HBM making the GPU with less units.

That is pretty clear HBM increase the size of the chip to be produced... to maintain the same size you need decrease the size of GPU.

Actually each HBM mem die uses 35mm2 of the chip in 14/16nm... you normally put 4x dies stacked on the chip... 7nm will probably made it small like 20mm2 per HBM mem die.

That is how HBM works.

It increases the chip and makes it expensive... the chip example I posted is 576mm2 plus 4x HBM 35mm2 + connectors... you say the chip is actually near 700mm2 (just to be clear this chip doesn't exists... it is an example).

Look at the Vega chip...

AMD-Vega-GPU.jpg


The 2 squares on top are the HBM2 part... they increase by about 30% the size of the chip.
 
Your own examples shows the chip is bigger.

GDRR6 is not part of the chip... it is outside the chip on the PCB and it didn't affect the chip production at all. HBM is produced/stacked inside the chip and it add complexity and size to the chip...

Let's think Sony wants a 400mm2 chip for PS5:

[NoHBM]
- 100mm2 for CPU
- 250mm2 for GPU
- 50mm2 others

[HBM]
- 100mm2 for CPU
- 100mm2 for HBM
- 150mm2 for GPU
- 50mm2 others

See? You have to put 100mm2 to HBM making the GPU with less units.

That is pretty clear HBM increase the size of the chip to be produced... to maintain the same size you need decrease the size of GPU.

Actually each HBM men die uses 35mm2 of the chip in 14/16nm... you normally put 4x dies stacked on the chip... 7nm will probably made it small like 20mm2 per HBM men die.

That is how HBM works.

It increases the chip and makes it expensive... the chip example I posted is 576mm2 plus 4x HBM 35mm2 + connectors... you say the chip is actually near 700mm2 (just to be clear this chip doesn't exists... it is an example).

Look at the Vega chip...

AMD-Vega-GPU.jpg


The 2 squares on top are the HBM2 part... they increase by about 30% the size of the chip.
Your theory doesn't explain why Fury X isn't compromised. 4096 ALUs. How many more could they fit without HBM?
 
Your theory doesn't explain why Fury X isn't compromised. 4096 ALUs. How many more could they fit without HBM?
It is not a theory lol

It is physically impossible to add memory to a chip without increase the size... the memory takes space on the chip.

Fuji with HBM in 28nm is a 596mm2 chip... without HBM it could be as smaller as 500mm2 or even lower.

Peharps you could have 4800 ALUs with the same 596mm2 size.
 
It is not a theory lol

It is physically impossible to add memory to a chip without increase the size... the memory takes space on the chip.

Fuji with HBM in 28nm is a 596mm2 chip... without HBM it could be as smaller as 500mm2 or even lower.

Peharps you could have 4800 ALUs with the same 596mm2 size.
All I'm saying is that without HBM there's already empty space around the chip that is not being utilized (apart from resistors that can be rearranged). That's where HBM DRAM chips can fit in without compromising anything.

There's an upper limit for manufacturing chips (I think it's 600mm2 for 300mm wafers). You can't make infinitely bigger chips without vastly decreasing the yield rate and 450mm wafers aren't a thing yet.

Wafer_die%27s_yield_model_%2810-20-40mm%29_-_Version_2_-_EN.png
 
All I'm saying is that without HBM there's already empty space around the chip that is not being utilized (apart from resistors that can be rearranged). That's where HBM DRAM chips can fit in without compromising anything.

There's an upper limit for manufacturing chips (I think it's 600mm2 for 300mm wafers). You can't make infinitely bigger chips without vastly decreasing the yield rate and 450mm wafers aren't a thing yet.

Wafer_die%27s_yield_model_%2810-20-40mm%29_-_Version_2_-_EN.png
HBM didn't use the non-uses space of a chip... it is stacked at the border, on lateral of the chip... it increase the size of the chip.

600mm2 is not the limit too... it just become expensive to sell these big chips... P100 is 610mm2 (again with HBM) and there are even bigger chip close to 800mm2 with 300mm wafer in the GPU history.

If you use some part of the chip for HBM you can't use it for GPU power.
 
HBM didn't use the non-uses space of a chip... it is stacked at the border, on lateral of the chip... it increase the size of the chip.

600mm2 is not the limit too... it just become expensive to sell these big chips... P100 is 610mm2 (again with HBM) and there are even bigger chip close to 800mm2 with 300mm wafer in the GPU history.

If you use some part of the chip for HBM you can't use it for GPU power.

Package size and limits are not silicon wafer/die limits so you need to stop conflating the two. The only thing effected on the actual die by hbm and ddr is the design of the memory bus.

HBM increases the package complexity but not the chip complexity with a transposer and HBM stacks. However it decreases motherboard layout and complexity costs because you remove the memory, traces and the design steps to make sure the traces are within a certain tolerance of each other.

It all equals out that atm it is more expensive then DDR but that has nothing to do with the silicon die itself.
 
HBM didn't use the non-uses space of a chip... it is stacked at the border, on lateral of the chip... it increase the size of the chip.

600mm2 is not the limit too... it just become expensive to sell these big chips... P100 is 610mm2 (again with HBM) and there are even bigger chip close to 800mm2 with 300mm wafer in the GPU history.

If you use some part of the chip for HBM you can't use it for GPU power.
It's more of a financial limit than a technical one.

800mm2 must have terrible yields, so it's gonna cost a lot. We'll never see 500-600mm2 chips in a console. Not to mention that Infinity Fabric will probably make large dies redundant...
 
I think people are heavily overestimating how much of the XBox1/PS4 market will be using XB1X or PS4P by late 2019 or late 2020. If only 15-20% of the active PS4 or XB1 playerbase is using the enhanced refreshes (which is actually a generous estimate given that only about 20% of PS4s sold since the launch of the PS4P have been PS4Ps), then for the vast majority of them the leap would be from the base model rather than the refreshes.

If Xbox 1 ends up selling, say, 45 million lifetime, 6 million of which are XB1Xes (I think that's a fair guess given the point we are in the lifetime of it, but you can tinker with the number if you like), that's a massive number of players used to gaming on the XBox1 who would see the leap from the Xbox 1 to the Xbox0 or whatever they call the next one as gigantic...and a far smaller group who are complaining "Hey, that doesn't even double my XB1X!"
 
I still think the big APU concept using a number of small-(ish), easier-to-manufacture CPU and GPU 'chiplets' is the way to go for future PlayStation and Xbox consoles.

The big wins would be high performance, scalability, high yields. Think of this pic as just a template for future console SoCs

SzwdY9p.png


https://www.overclock3d.net/news/cp...a_exascale_mega_apu_in_a_new_academic_paper/1

One of the largest issues comes when manufacturing large CPU/GPU dies, with yields decreasing and costs rising as you create larger products. Imagine a silicon wafer and imagine that a single wafer has a certain number of defects, each wafer creates a certain number of chips, which means that only a small number of chips will be affected in the whole batch. When creating products with large die sized the number of chips per silicon wafer decreases, which means that defects can destroy a larger proportion of the products in a single silicon wafer.

According to this paper, AMD wants to get around this "large die issue" by making their Exascale APUs using a large number of smaller dies, which are connected via a silicon interposer. This is similar to how AMD GPUs connect to HBM memory and can, in theory, be used to connect two or more GPU, or in this case CPU and GPU dies, to create what is effectively a larger final chip using several smaller parts.

In the image below you can see that this APU uses eight different CPU dies/chiplets and eight different GPU dies/chiplets to create an exascale APU that can effectively act like a single unit. If these CPU chiplets use AMD's Ryzen CPU architecture they will have a minimum of 4 CPU cores, giving this hypothetical APU a total of 32 CPU cores and 64 threads.

This new APU type will also use onboard memory, using a next-generation memory type that can be stacked directly onto a GPU die, rather than be stacked beside a GPU like HBM.

Right now this new "Mega APU" is currently in early design stages, with no planned release date. It is clear that this design uses a new GPU design that is beyond Vega, using a next-generation memory standard which offers advantages over both GDDR and HBM.

Building a large chip using several smaller CPU and GPU dies is a smart move from AMD, allowing them to create separate components on manufacturing processes that are optimised and best suited to each separate component and allows each constituent piece to be used in several different CPU, GPU or APU products.

For example, CPUs could be built on a performance optimised node, while the GPU clusters can be optimised for enhanced silicon density, with interposers being created using a cheaper process due to their simplistic functions that do not require cutting edge process technology.

This design method could be the future of how AMD creates all of their products, with both high-end and low-end GPUs being made from different numbers of the same chiplets and future consoles, desktop APUs and server products using many of the same CPU or GPU chiplets/components.

The CPU chiplets could be any generation of Zen (i.e. Zen 2, Zen 3)

The GPU chiplets could be based Navi or 'Next Gen' GPU, and of course, semi-custom
something between Navi and Next Gen. PS4 Pro is largely based on Polaris but has a couple features from Vega.

Memory is not as clear cut. They seem to be talking about something other than HBM (or DDR) but like HBM at the same time. stacked DRAM of some sort. Navi is meant to have 'next gen' memory, but whether that's HBM3 or something else isn't clear in AMD's roadmaps.

Regardless, a big APU made from smaller CPU & GPU chiplets, the 7nm or 7nm+ process, and some type of stacked DRAM for high bandwidth (be that HBM or something else). seems to be the way forward for future consoles in the 2020/2021 time frame.

To me, 2019 does not seem feasible, but on the other hand, 2022-2023 is way too far away and this generation shouldn't go that long without successors, even if base PS4 slim is still in production until 2023+ given that PS3 production recently ended this year.
 
I still think the big APU concept using a number of small-(ish), easier-to-manufacture CPU and GPU 'chiplets' is the way to go for future PlayStation and Xbox consoles.

The big wins would be high performance, scalability, high yields. Think of this pic as just a template for future console SoCs

https://www.overclock3d.net/news/cp...a_exascale_mega_apu_in_a_new_academic_paper/1





The CPU chiplets could be any generation of Zen (i.e. Zen 2, Zen 3)

The GPU chiplets could be based Navi or 'Next Gen' GPU, and of course, semi-custom
something between Navi and Next Gen. PS4 Pro is largely based on Polaris but has a couple features from Vega.

Memory is not as clear cut. They seem to be talking about something other than HBM (or DDR) but like HBM at the same time. stacked DRAM of some sort. Navi is meant to have 'next gen' memory, but whether that's HBM3 or something else isn't clear in AMD's roadmaps.

Regardless, a big APU made from smaller CPU & GPU chiplets, the 7nm or 7nm+ process, and some type of stacked DRAM for high bandwidth (be that HBM or something else). seems to be the way forward for future consoles in the 2020/2021 time frame.

To me, 2019 does not seem feasible, but on the other hand, 2022-2023 is way too far away and this generation shouldn't go that long without successors, even if base PS4 slim is still in production until 2023+ given that PS3 production recently ended this year.
Is that possible for 2020?
 
Bro 16GB isn't enough ram for next gen. Subtract 4GB for the OS, leaves just 12 to be shared for the CPU/GPU. They need at least 32GB. Next gen will last from 2021 till probably the end of that decade. Also it's kinda funny to me how your just religiously opposed to HBM3. I wounder what will bandwidth requirements will be like in 2025+ when next gen is in full swing :)

I think 16GB of fast RAM would be plenty for a console, most PC's still don't have more than 16GB and consoles don't have a lot of background processes like a PC, so even if they save 3GB-4GB for the OS, 12GB-13GB for games would still be plenty for 4k textures ect.

Plus if mid gen refresh happens again, they could add more RAM if they really needed too.
 
I think 16GB of fast RAM would be plenty for a console, most PC's still don't have more than 16GB and consoles don't have a lot of background processes like a PC, so even if they save 3GB-4GB for the OS, 12GB-13GB for games would still be plenty for 4k textures ect.

Plus if mid gen refresh happens again, they could add more RAM if they really needed too.
The main reason people are talking about more RAM is for streaming/loading purposes. 4k assets are large and being able to store larger amounts of data in RAM could help load times quite a bit.
 
Semi Custom APU's unlikely to be first thing off the press.

This is why I said 2020, right now GloFlo/TSMC is taking designs from customers so they can start mass production, which is in about 6 months (1st half of 2018).
They are shifting to 7nm EUV in 2019 so 1st half of 2020 all the big boys will have their products on the market, assuming PS5 launches in Q4 of 2020 then that doesn't conflict.
This is a fact and straight from GloFlo/TSMC press release and conference call (the PS5 bit is just me looking a the gap, the schedule for PC is correct though).
 
This is why I said 2020, right now GloFlo/TSMC is taking designs from customers so they can start mass production, which is in about 6 months (Q1 2018).
They are shifting to 7nm EUV in 2019 so 1Q of 2020 all the big boys will have their products on the market, assuming PS5 launches in Q4 of 2020 then that doesn't conflict.
This makes a lot of sense. I was pretty adamant about 2019 before but I didn't keep the manufacturing process in mind.
 
I think a lot of people are going to be disappointed when these console life cycles last just as long as the 360 did. I feel like we will see the Pro and XBOX get price reductions and redesigns (Maybe even exclusive games) before we see a full next generation console. And by that time a $399 launch with guts that are a generational gap ahead will be more than feasible.
 
That's assuming Sony waits for 7nm+..

Hard to say what they'll do but 2020 is definitely more favorable in all aspects of the game.
You'd have 2-3 years more of PS4 on the market, incl cross-gen then in 2023 you discontinue it (10 year plan honored).


The big wins would be high performance, scalability, high yields. Think of this pic as just a template for future console SoCs

I think you might have hit the nail on the head as to what Navi actually is!
Next gen memory would be referring to HBM3/Low-Cost HBM, which is technically correct as it is a next-gen memory and due for 2019.
In other words Navi would be a Mega-APU, it all adds up, otherwise we would have known if it's a completely new memory through press releases from Samsung, Hynix, Micron, etc etc.
When you look at R9 Nano you can see that they were already testing the waters with such a setup, given the form factor and all it makes sense for them to improve upon this concept.

51069_02_amds-gpu-roadmap-teases-vega-2017-navi-2018.jpg

R9_Nano_Straight_On_Front_Thermal_1_RGB_5inch.jpg
 
Hard to say what they'll do but 2020 is definitely more favorable in all aspects of the game.
You'd have 2-3 years more of PS4 on the market, incl cross-gen then in 2023 you discontinue it (10 year plan honored).




I think you might have hit the nail on the head as to what Navi actually is!
Next gen memory would be referring to HBM3/Low-Cost HBM, which is technically correct as it is a next-gen memory and due for 2019.
In other words Navi would be a Mega-APU, it all adds up, otherwise we would have known if it's a completely new memory through press releases from Samsung, Hynix, Micron, etc etc.
When you look at R9 Nano you can see that they were already testing the waters with such a setup, given the form factor and all it makes sense for them to improve upon this concept.

51069_02_amds-gpu-roadmap-teases-vega-2017-navi-2018.jpg

R9_Nano_Straight_On_Front_Thermal_1_RGB_5inch.jpg

Well, I'm not implying that Navi graphics will only come in the form of APUs. There's no doubt AMD will have consumer and professional graphics cards with standalone Navi GPUs, as with Polaris and Vega. These Mega APUs should obviously use Navi graphics architecture, and later, the architecture beyond Navi, coupled with whatever generation of Zen is appropriate at the time.

As for HBM3, that will no doubt be used in discrete Navi GPUs as well as the mega APUs. The big question is, will HBM3 come in time and be feasible for future consoles.
I don't think GDDR6 will provide enough bandwidth unless Sony and Microsoft go for very conservative consoles in the early 2020s.
 
Well, I'm not implying that Navi graphics will only come in the form of APUs.
The big question is, will HBM3 come in time and be feasible for future consoles.

I know, just pointing out that we have an idea now as to what Navi actually is and it's setup.
Samsung and Hynix are pushing HBM3 hard so that gives more re-assurance and then you also got Low-Cost HBM which is meant for mass market consumer electronics.
 
I know, just pointing out that we have an idea now as to what Navi actually is and it's setup.
Samsung and Hynix are pushing HBM3 hard so that gives more re-assurance and then you also got Low-Cost HBM which is meant for mass market consumer electronics.

I'm hoping Nvidia uses Low Cost HBM in future Tegra SoCs (after Volta based Xavier) in the early 2020s and perhaps that could be implemented in future Nintendo hardware. Not counting possible Switch revisions / iterations, If Nintendo felt the need to make another jump like 3DS to Switch for their next generation, it makes more sense going from Tegra X1's 25 GB/s bandwidth straight to Low Cost HBM (128 to 256 GB/s) than it does to Tegra Parker's 50 GB/s bandwidth, or whatever Xavier uses (probably not Low Cost HBM).

That said, HBM needs to be far more widely adopted in the next few years if there's going to be a chance for Sony & Microsoft to use HBM3, and Nintendo to use Low Cost HBM. It very well may not happen, we'll see!
 
I still think the big APU concept using a number of small-(ish), easier-to-manufacture CPU and GPU 'chiplets' is the way to go for future PlayStation and Xbox consoles.

The big wins would be high performance, scalability, high yields. Think of this pic as just a template for future console SoCs

SzwdY9p.png


https://www.overclock3d.net/news/cp...a_exascale_mega_apu_in_a_new_academic_paper/1





The CPU chiplets could be any generation of Zen (i.e. Zen 2, Zen 3)

The GPU chiplets could be based Navi or 'Next Gen' GPU, and of course, semi-custom
something between Navi and Next Gen. PS4 Pro is largely based on Polaris but has a couple features from Vega.

Memory is not as clear cut. They seem to be talking about something other than HBM (or DDR) but like HBM at the same time. stacked DRAM of some sort. Navi is meant to have 'next gen' memory, but whether that's HBM3 or something else isn't clear in AMD's roadmaps.

Regardless, a big APU made from smaller CPU & GPU chiplets, the 7nm or 7nm+ process, and some type of stacked DRAM for high bandwidth (be that HBM or something else). seems to be the way forward for future consoles in the 2020/2021 time frame.

To me, 2019 does not seem feasible, but on the other hand, 2022-2023 is way too far away and this generation shouldn't go that long without successors, even if base PS4 slim is still in production until 2023+ given that PS3 production recently ended this year.

Wait, if I get this right. Instead of having one huge chip AMD plans to build APUs by connecting a bunch of smaller GPU's and CPU's together?

Is this like SLI or Crossfire in any way? Becuase that wouldn't be too good for discreet PC video cards would it?
 
I'll side-step the tech talk here because I don't currently have the time to review all that stuff. Just popping in to say that I think Microsoft will stick with $500 being their base price for non-revision consoles going forward. That is unless the Xbox One X completely bombs at that price.
 
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