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Next-Gen PS5 & Next Xbox |OT| Speculation/Analysis/Leaks Thread

Next Gen Consoles Power Level


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Munki

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"The combination of the S O C and the solid state drive.." (it does sound like SSD first time you hear it)

[2:06 timestamp]

What I don't understand is why MS is exclusively using people's moms and dads to describe the console .. I get that gamers are getting older, but bring back J Allard for christs sake - this is dull
I agree. They should at least provide the names and roles of the ppl in the videos.
 
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henau212

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PS5 Jetfighter Edition
:messenger_tears_of_joy: Must be something like that..

Crazy thought: What if MS went to Sony (or vice versa): 'Hey, want to do splitsies on the SOC development for next gen?'. 'Yeah, good idea.. Then we could also use the same servers for cloud streaming.' and so on. Only difference being the software, the housing and the cooling obviously (Sony always fucks that one up.. Kinda like AMD). Would also be a dream for every third party developer.
 

DemonCleaner

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well even if that conference was somewhat of an abomination and i will certainly go berzerk when the up the cheering crowd once again next year, i have kinda positive feelings afterwards.

hardware raytracing is here.. fuck yeah! halo tech demo looked good, even if it said in engine and not realtime. might have had raytraced GI going.
 

Armorian

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For people who think it will be 24 tflops (y)


If you let me back I'll be here. Back to Scarlett... you mentioned it has four times the power of Xbox One X, which certainly sounds good. But what does that mean?

Matt Booty: It's a few things - it's the combination of speed, not just of the SSD but of the processor, the performance of the GPU and RAM, but we're also in a world where speed is starting not to matter. You can make RAM faster either by speeding up the way you access it or by adding more access points. Just think, what are all the things right now which take you out of a game? You're playing then suddenly *bloop* a load screen pops up and drops you out. Our goal is to get rid of those things, that's what we're after.

What do you think about the state of the industry right now? When you look around, who's here, who's not, what trends are you seeing in the industry?



So it was math magic all along :geek:
 

jonnyp

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I don't know why, but I've got a feeling Microsoft's console will be more advanced than Sony's.

Probably the X still gives them the advantange as it is the most powerful console today.
What do you mean by 'advanced'? They are confirmed to be using the same tech.
 
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Negotiator

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:messenger_tears_of_joy: Must be something like that..

Crazy thought: What if MS went to Sony (or vice versa): 'Hey, want to do splitsies on the SOC development for next gen?'. 'Yeah, good idea.. Then we could also use the same servers for cloud streaming.' and so on. Only difference being the software, the housing and the cooling obviously (Sony always fucks that one up.. Kinda like AMD). Would also be a dream for every third party developer.
After the Azure partnership this wouldn't surprise me at all, but they're still playing chicken game with specs, so...
 

DemonCleaner

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[more] I spotted 12 (3 on each side) - at 2GB (16Gb) that's 24GB

[more 2] (so 674GB/s)

[edit] If I had the DRAM chip size the die size of the APU could be estimated - don't have it though..
where did you spot 12? i didn't see more than two sides around the SOC.

concerning 3 packages on four sides i'm not sure that is even possible. you'd have to space your memory controllers in a manner on the soc that you have somewhat similar distances (or better bus lengths) between the ram packages and the memory controllers, otherwise V_drop won't be constant among them. you'd also have to leave space for your PCI4 bus on the SOC which would take enough space that you shouldn't be able to fit more than a max of 2 GDDR packages (at max) on this crtitical side.
 

DemonCleaner

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where did you spot 12? i didn't see more than two sides around the SOC.

concerning 3 packages on four sides i'm not sure that is even possible. you'd have to space your memory controllers in a manner on the soc that you have somewhat similar distances (or better bus lengths) between the ram packages and the memory controllers, otherwise V_drop won't be constant among them. you'd also have to leave space for your PCI4 bus on the SOC which would take enough space that you shouldn't be able to fit more than a max of 2 GDDR packages (at max) on this crtitical side.
i checked the video it's definitly not 3 packages on four sides.


see:





it's probably

4 north
3 or 4 west (probably 4 because the soc looked elongated in the render)
4 south

which reserves the PCI4 bus for the east side
 
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llien

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Yeap Radeon RX 5700 turned out lower than expected... it will probably lose most benchs to RTX 2070.
Because we see it beat 2070 even in vidia sponsored games like OC Odissey?



I keep in mind how bias works, but come on!
Focus on stuff that is at least up to interpretations.
E.g. "but RTX", "but 2070 die size is bigger, so it's easier to cool", etc. :)
 

xool

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where did you spot 12? i didn't see more than two sides around the SOC.
ok so there's something fuzzy off far right at ~1:16 - I think I can see 3 top, and at least 2 right .. so cofirmation bias + expections + logic (not 11) =12

[edit - I saw at least 9 so 12 right ? also agree with your post above - is the motherboard a different way up though - I didn't spot the 1 NW chip at 1m16 .. ]

concerning 3 packages on four sides i'm not sure that is even possible.
Wiggly lines

Beyond3D is saying there is two boards in the Scarlett video... one blue and another green.

The Blue motherboard has 12 GDDR6 chips while the Green has only 6 GDDR6 chips...

Lockhart (green) and Anaconda (blue)?
1m56sec .. but I can't see all the chips
 
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DemonCleaner

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Beyond3D is saying there is two boards in the Scarlett video... one blue and another green.

The Blue motherboard has 12 GDDR6 chips while the Green has only 6 GDDR6 chips...

Lockhart (green) and Anaconda (blue)?
i can't see shit on the blue board in the video. and the green one could also house 12 packages
 
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ethomaz

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i can't see shit on the blue board in the video. and the green one could also house 12 packages
I’m reading a bit more in the thread some said one of the boards are literally the actual Xbox One X board... that one with 12 chips.

 
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xool

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DemonCleaner

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I’m reading a bit more in the thread some said one of the boards are literally the actual Xbox One X board... that one with 12 chips.

yeah might really be x1x. but the pcb layout there is good for that type of memory configuration. could probably go with it.


on the blue PCB i can't spot shit:

 
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DemonCleaner

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concerning the quote from the conference that the SSD now works more like an additional pool of RAM:

i think sony and microsoft both will go with an evolution of AMD's high bandwidth cache controller which allowed the user since vega to dedicate some part of his system RAM as addtional frame buffer (there have historically even been radeon instinct cards which let you put on a SSD as a VRAM extension). as soon as turned on, the game only see's one vram pool and the data micromanagement is done by the HBCC autonomously.
 

Negotiator

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concerning the quote from the conference that the SSD now works more like an additional pool of RAM:

i think sony and microsoft both will go with an evolution of AMD's high bandwidth cache controller which allowed the user since vega to dedicate some part of his system RAM as addtional frame buffer (there have historically even been radeon instinct cards which let you put on a SSD as a VRAM extension). as soon as turned on, the game only see's one vram pool and the data micromanagement is done by the HBCC autonomously.
Why would they use NAND storage as a GPU framebuffer (tons of read-write-modify operations)? I won't even mention the speed disparity (2-4 GB/s vs 672 GB/s).

Next-gen consoles will most likely use QLC NAND (100-1000 write cycles) for cost reasons.
 

DemonCleaner

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Why would they use NAND storage as a GPU framebuffer (tons of read-write-modify operations)? I won't even mention the speed disparity (2-4 GB/s vs 672 GB/s).

Next-gen consoles will most likely use QLC NAND (100-1000 write cycles) for cost reasons.
the point of my post was not that they would use NAND as a framebuffer but that AMD has the technology to further unify memory pools in an "invisable to the user" manner (HBCC and as i posted some time ago storeMI for that matter). sorry if that wasn't comprehensible.
 
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Negotiator

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the point of my post was not that they would use NAND as a framebuffer but that AMD has the technology to further unify memory pools in an "invisable to the user" manner (HBCC and as i posted some time ago storeMI for that matter). sorry if that wasn't comprehensible.
I still think manual micromanagement will be required to maximize efficiency. Automatic management is nice, but it yields much lower efficiency usually.

That was also the case with eSRAM. MS has some tools to make it transparent to programmers, but I remember a DICE presentation about Battlefield arguing that manual programming is better.
 

DemonCleaner

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I still think manual micromanagement will be required to maximize efficiency. Automatic management is nice, but it yields much lower efficiency usually.

That was also the case with eSRAM. MS has some tools to make it transparent to programmers, but I remember a DICE presentation about Battlefield arguing that manual programming is better.
yeah i bet your right about that. but i think it would be crucial that there was an "automatic mode" for accessibility for lower budget projects.
 
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Lort

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yeah i bet your right about that. but i think it would be crucial that there was an "automatic mode" for accessibility for lower budget projects.
It will prob allow cache hints such as amd 3dnow prefetch command. ( the 360 had a similar command)... having hints and manual managment still possible would be the best.
 
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ethomaz

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Code named ‘Scarlett’

Anaconda DON’T exist
Scarlett is the codename to the next-gen platform or project.
Anaconda is the codename for one model of Scarlett.
Lockhart is suppose to the the codename of the other model of Scarlett.

MS is trying to dodge questions about Lockhart but it is clear that they have two Scarlett models to be launched... they said it last E3, they didn't deny in EG interview and they wrote again that in Halo Infinite official page.

I did not even cut off the changes for a 3rd model... the streaming only.
 
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bitbydeath

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Scarlett is the codename to the next-gen platform or project.
Anaconda is the codename for one model of Scarlett.
Lockhart is suppose to the the codename of the other model of Scarlett.

MS is trying to dodge questions about Lockhart but it is clear that they have two Scarlett models to be launched... they said it last E3, they didn't deny in EG interview and they wrote again that in Halo Infinite official page.

I did not even cut off the changes for a 3rd model... the streaming only.
Maybe but the one they’ve shown is code named Scarlett.

So unless there’s going to be three of them either Lockhart or Anaconda is no longer.
 

CyberPanda

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Maybe but the one they’ve shown is code named Scarlett.

So unless there’s going to be three of them either Lockhart or Anaconda is no longer.
Ummm. Project Scarlet is the code name for their next gen project, and there are two SKUs under that umbrella:

Lockhart
Anaconda
 
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ethomaz

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Maybe but the one they’ve shown is code named Scarlett.

So unless there’s going to be three of them either Lockhart or Anaconda is no longer.
Even if Lockhart doesn't exists (ignoring all the evidences from MS) the console model to be launched next year has a internal codename (probably Anaconda?) while Scarlett continue being their Next-Gen Project codename.
 
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