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[jeff_rigby]

There have been multiple cites that stacked memory on interposer is coming for game consoles in 2013 and multiple cites for Sony interested in TSVs and stacked memory but no actual product announcement. The following in a Oct 2011 PDF published by Amkor is a product intercept for Q3 2013 for stacked DDR memory using TSVs on an Interposer with TSVs connected to CPU/GPU

AMKOR page 2 http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf
AMD-Hynix Memory PDF on High Bandwidth Memory (HBM) http://sites.amd.com/us/Documents/TFE2011_006HYN.pdf. Hybrid Memory Cube (HMC) without the bottom logic layer may be identical to HBM, in principal the idea is the same but we don't know if the "standards" are the same.

Multiple professionals have been speculating this for the PS4 and at least one AMD design is getting this and I'd guess it's PS4 and Xbox 720.

Amkor is the company packaging the GF AMD APU; TSMC packages their own chips. The date on the PDF is Oct 2011 and plans to use stacked memory were already in place with the Sony CTO (Jan 2012) article and Sony lecture by SVP Technology platform (Sept 2011) both commenting on 300FPS and TSVs supporting the needed high memory bandwidth available with wide IO memory.

Sony CTO interview on Playstation tech
Compilation of Cites supporting 3D stacked memory including Sony VP Technology platform lecture with slides.

Game Console SOCs shown using 3D stacked/ultrawide with TSVs memory (faster, eventually cheaper & energy efficient) and 3D ultra wide I/O memory

Good news for people who wanted 2.5D stacking in nextgen consoles. We have first initial predictions about cost of silicon interposers:
http://www.electroiq.com/articles/ap/2012/12/lifting-the-veil-on-silicon-interposer-pricing.html

According to this cost analysis one 300mm silicon interposer wafer would cost $575, and this wafer could be cut into 286 blocks of 200mm2. Great price indeed, just ~2$ for 200mm2 interposer [assuming yield is 100%].

Supported speculation is at least 2 Jaguar CPU packages (8 Jaguar cores) with a modified to support Wide IO GNB APU core out of the Samala/Penner APU's and a 8XXX series GPU. There may be a second GPU and it likely will be a 8XXXM series.

Delayed

From SemiAccurate uuse5

To whichever company using Amkor, could this be the confirmation of the rumors of delay for production?

PDF from Oct 2011
Page 2
Si Interposer + DDR + Logic
GPU / CPU (28nm)
http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf

PDF from Feb 2012
Page 10
http://www.amkor.com/download.cfm?d...DC8BFAE253&typename=dmFile&fieldname=filename
On page 10 we see the same chart as in the Oct 2011 document, but with Si Interposer + DDR + Logic chip delayed 6 months, pushed into mid 2014

 

[pants]

Cool, would work great with the PS4 webkit browser!

 

[iamshadowlark]

Couldn't put this in the other thread?

 

[mr_nothin]

Cool, would work great with the PS4 webkit browser!

LOL
Oh damn

 

[Sethos]

What, someone needs to do this in layman's terms.

 

[Basileus777]

Couldn't put this in the other thread?

New news gets new threads. And this.

 

[RoboPlato]

What, someone needs to do this in layman's terms.

Wide I/O RAM is a more efficient version of DDR4 RAM. It outperforms GDDR5. If this winds up in a console it would probably be a low amount but with a high bandwidth to make up any performance differences. It's more likely to come from Sony since we know they were initially planning on GDDR5 in the PS4 but it's hot and expensive and there is a RAM gap that they need to fill between the PS4 and the next Xbox.

 

[James Sawyer Ford]

Wide I/O RAM is a more efficient version of DDR4 RAM. It outperforms GDDR5. If this winds up in a console it would probably be a low amount but with a high bandwidth to make up any performance differences. It's more likely to come from Sony since we know they were initially planning on GDDR5 in the PS4 but it's hot and expensive and there is a RAM gap that they need to fill between the PS4 and the next Xbox.

So how much could they include at a reasonable cost? Is this essentially like a step between GDDR5 and eDRAM?

 

[JaseC]

New news gets new threads. And this.

Could this be considered "new news", though? I mean:

There have been multiple cites that stacked memory on interposer is coming for game consoles in 2013 and multiple cites for Sony interested in TSVs and stacked memory but no actual product announcement.

No cites.

The following in a Oct 2011 PDF published by Amkor is a product intercept for Q3 2013 for stacked DDR memory using TSVs on an Interposer with TSVs connected to CPU/GPU

14-month-old PDF.

AMKOR page 2 http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf

At least one AMD design is getting this and I'd guess it's PS4 and Xbox 720.

A guess.

Amkor is the company packaging the GF AMD APU; TSMC packages their own chips. The date on the PDF is Oct 2011 and plans to use stacked memory were already in place with the Sony CTO (Jan 2012) article and Sony lecture by SVP Technology platform (Sept 2011) both commenting on 300FPS and TSVs supporting the needed high memory bandwidth available with wide IO memory.

Sony CTO interview on Playstation tech
Compilation of Cites supporting 3D stacked memory including Sony VP Technology platform lecture with slides.

Game Console SOCs shown using 3D stacked/ultrawide with TSVs memory (faster, eventually cheaper & energy efficient) and 3D ultra wide I/O memory

Supported speculation is at least 2 Jaguar CPU packages (8 Jaguar cores) with a modified to support Wide IO GNB APU core out of the Samala/Penner APU's and a 8XXX series GPU. There may be a second GPU and it likely will be a 8XXXM series.

Supposedly relevant information supported by "supported speculation" that lacks supporting citations, but even if it were supported, would only feed back into the aforementioned guess.

 

[James Sawyer Ford]

Well it wouldn't be a Jeff rigby post if it didnt take a flimsy piece of evidence and jump to massive conclusions

 

[itsgreen]

Jeff this isn't news... This is just more speculation... Like the 100's of posts in the ps4 thread... This could have easily fitted in that one

 

[The Faceless Master]

Could this be considered "new news", though? I mean:



No cites.



14-month-old PDF.



A guess.



Supposedly relevant information supported by "supported speculation" that lacks supporting citations, but even if it were supported, would only feed back into the aforementioned guess.

see, your reply actually gives reasons as to why that is a valid point. the other poster wasn't backing up their point.

 

[Globox_82]

Wide I/O RAM is a more efficient version of DDR4 RAM. It outperforms GDDR5. If this winds up in a console it would probably be a low amount but with a high bandwidth to make up any performance differences. It's more likely to come from Sony since we know they were initially planning on GDDR5 in the PS4 but it's hot and expensive and there is a RAM gap that they need to fill between the PS4 and the next Xbox.

Yeah since we know everything about nextbox ram.....

 

[jeff_rigby]

Could this be considered "new news", though? I mean:

No cites.
14-month-old PDF.
A guess.
Supposedly relevant information supported by "supported speculation" that lacks supporting citations, but even if it were supported, would only feed back into the aforementioned guess.

1) Every professional organization expects the next generation game consoles to use 3D stacked wide IO memory.
2) AMD has been showing prototypes and releasing slides of stacked memory on interposer.
3) Amkor who packages chips for AMD has a wide IO memory on interposer with CPU and GPU product for Q3-Q4 2013 when we expect next generation game consoles.

The arguments against wide IO memory on interposer for the PS4 are that it won't be ready in 2013 for the PS4. This shows a product is shipping in time for next generation and was planned since Sept 2011. The 14+ months lead time is what's needed to launch it.

I can only guess that you have not looked at the cites so here they are.

Memory of 2.5D and wide connections described are used in semiconductor research firm GPU [rumor], next generation of PS3 (PS4). This Sony lecture used as the basis of the ultra wide memory speculation.

http://www.i-micronews.com/upload/Rapports/3D_Silicon_&Glass_Interposers_sample_2012.pdf

Good article linked in the above: Flow to the wide DRAM technology solutions to increase the momentum in the 2.5D

In summary, AMD not using 3D stacking at this point, will use 2.5D with interposer and implement wide I/O memory to get the memory transfer speed needed for Fusion chips. GDDR5 being replaced by ultra-wide RAM most likely DDR4.

HPC memory and graphics memory GDDR5 post for (High Performance Computing) is heading to the introduction of the technology of wide memory interface. It uses a technology solution: (Through Silicon Via TSV) through-silicon vias. However, it is said instead of DRAM stack directly on top of the CPU and the GPU, and are considering the introduction of a method to use the I / O chip and silicon interposer.

One of the plans that has emerged is a way to connect with a wide DRAM interface CPU and GPU silicon interposer technology using TSV. Called for the 3D stacking DRAM stacked directly on CPU and GPU, and how to use the interposer is 2.5D. As in the case of 3D stacking, ultra-wide interface can be used by a very large number of micro-bump pins. However, unlike 3D stacking, there is no need to use a TSV the GPU or CPU, in terms of reduced risk of manufacture.

By using ultra-wide interface, low power consumption, using the TSV solution can achieve ultra-wideband memory. Standards relatively quiet, "Wide I / O" is a wide interface for mobile DRAM, the bandwidth is 12.8GB/sec memory per chip. However, in ultra-wideband 4-8 times of Wide I / O, in a non-mobile, memory bandwidth is that you want to target are considering to 100GB/sec per chip. Development of Wide I / O These are sometimes referred to by the name Wide I / O and Ultra Wideband Wide I / O, such as computing Wide I / O.

From gofreak:

http://www.i-micronews.com/upload/3DPackaging/AC_3D Packaging_August2012_Web.pdf

Quote:

Sony’s next game station logic- on-interposer will reportedly similarly be fabbed by Global Foundries, and packaged by a collaborating OSAT (probably ASE, StatsChipPAC, SPIL or again Amkor).
Earlier in the year a panel of manufactuers (including Global Foundries), talking about 2.5/3D infrastructure, were asked if any of them would be supplying Sony for PS4.

AMKOR http://sites.amd.com/la/Documents/TFE2011_001AMC.pdf

http://www.electroiq.com/blogs/insi...ure-at-imaps-device-packaging-conference.html

3) 3D wafer stacked memory will be ready for Game Consoles 2013-2014 Provides even more efficiencies when inside the SOC.

This picture of an AMD GPU on interposer is also in the AMKOR PDF on page 8

Micron Stockholder meeting August 2011:

Graphics and consumer. Fair to say, a little bit of a slowdown here, specifically in the DTV segment. I'll speak more about what's happening in game consoles as well. A pretty good push for more memory coming up in the Game Console segment as a level of redesigns. We'll start to hit it over the next couple of years.

And talking about consumer again here. I thought it'd be beneficial to show you across a couple of key applications how this looks in terms of megabyte per system. On the left, what we have are game consoles. This is a space that's been pretty flat for a number of years in terms of the average shipped density per system. That's going to be changing here pretty quickly. I think everyone realizes that these systems are somewhat clumpy in their development. The next generation of system is under development now and that because of 3D and some of the bandwidth requirements, drives the megabyte per console up fairly quickly. So we're anticipating some good growth here.

We've worked with a number of these vendors specifically on both custom and semi-custom solutions in that space.

Micron says it will deliver early next year 2 and 4 Gbyte versions of the Cube providing aggregate bi-directional bandwidth of up to 160 Gbytes/second.

Separately, the Jedec standards group is working on a follow on to the 12.8 Gbit/second Wide I/O interface that targets mobile applications processors. The so-called HB-DRAM or HBM effort is said to target a 120-128 Gbyte/second interface and is led by the Jedec JC-42 committee including representatives from Hynix and other companies.

Micron is making 2 gig and 4 gig stacks of ultrawide I/O memory and IBM is making the logic layer, it's not known at this time who is assembling the HMC. The 2 gig and 4 gig Micron memory stacks without the logic layer could be used for other purposes. 2Gig and 4 Gig HMC are too small for servers, their intended target, but could be proof of concept with memory that was originally targeted at the PS4 and Xbox 720.