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Next-Gen PS5 & XSX |OT| Console tEch threaD

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Lethal01

Member
I'm not 100% sure about that second tweet, but I think the word 'combined' is the wrong choice, and should have been 'in parallel', so that it doesn't read like you can zlib compress Bcpack textures - when presumably it means transferring of Bcpack textures and zlib game data in parallel to RAM from SSD - obviously sharing bandwidth.
yeah that's what I thought too.
Basically saying that having better compression for texture but slightly worse compression for other things will give much better compression for the game overall than just having kraken
 

EliteSmurf

Member
Neo member - checked
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Seriously though. The Sony marketing that is going on here for is beyond ridiculous. Are you a Sony shill or what is going on? Where are all these shills suddenly come from?
this Little Mark Cerny, this SSDfan and now this guy. And many many more. WTF is going on?

4syh5WA.png

Ironic isn't it? :messenger_tears_of_joy:
giphy.gif
 

Faithless83

Banned
I hate to be that guy but honestly? They don't want to overshadow TLOU2 so I doubt they will have the conference next week. The 18th makes sense though.
People will finish the game, the expected meltdown will happen. When the angry mob rises they'll be like "look look at these PS5 games".

And then, just like that, we love Sony again.

I don't like it, but it fits.
 
The thing that has just occurred to me is, that PS5 devkits, if they've followed the normal path of devkits should have twice the RAM(32GB) of a retail unit (16GB)- for the ability to mirror all the data for when they need to debug, but without interfering with the in-flight code IIRC - so the solution to a last minute bump in RAM for a retail unit should already be in place from the devkit design. IIRC wasn't that the situation when the PS4 got a RAM upgrade from 4GB to 8GB? Original PS4 devkits had 8GB, 4GB for game/os and 4GB for debug or am I remembering that wrong?

I do not know anything about the PS4 devkits, but changes to the RAM configuration might affect the thermal profile.
 

roops67

Member
The thing that has just occurred to me is, that PS5 devkits, if they've followed the normal path of devkits should have twice the RAM(32GB) of a retail unit (16GB)- for the ability to mirror all the data for when they need to debug, but without interfering with the in-flight code IIRC - so the solution to a last minute bump in RAM for a retail unit should already be in place from the devkit design. IIRC wasn't that the situation when the PS4 got a RAM upgrade from 4GB to 8GB? Original PS4 devkits had 8GB, 4GB for game/os and 4GB for debug or am I remembering that wrong?
Not without adding more memory controllers onto the APU. As far as I know, PS5 has 4 x 64bit(lanes) controllers, the 8 x 2GB GDDR6 RAM chips are 32 lanes. So 2 RAM modules are connected per memory controller... or if the 4GB ram modules are available then yeah
 
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L4 cache? What/where is that in the APU?
What L4 cache?
L4 cache is the embedded SRAM on the SoC. Most people probably overlooked this bit, or simply do not know what it means, but it is a static RAM that is closer to SoC than the main system 16GB GDDR6 RAM (and thus has even less latency, perfect for streaming related stuff). Don't know its size however I can speculate it is around 32-64MB. You guys probably still remember Xbox One's 32MB eSRAM that was right on the chip which was made to close the gap for their use of DDR3 RAM as main system memory instead of GDDR5. This time however, PS5 has plentiful main system RAM with good BW and really (REALLY) high bandwidth NAND chips for storage, so it is hard for me to say PS5's usage of eSRAM as it doesn't need it to increase BW but a special purpose. It takes up precious die space so the reason of its existence must be really important but don't know why people simply overlooked it. I thought it was a well known feature of PS5, certainly since it was really badly implemented in Xbox One as a stop gap for their glaring BW deficit.

Well I can speculate a few use cases:
First, Tempest Audio is configured as RAMless DMA engine so if it requires memory pointers, SRAM is closest and probably one with least latency being on the same chip.

Second, is still related to Tempest however not for audio solution for PS5 games but for BC. I think TE which is described as SPU like chip can behave like CELL for PS3, RSX is GPU portion with its own GDDR6 RAM, however you guys must remember PS3 had split memory configuration where it's GPU - RSX had its own memory and its CPU - CELL also had its own, well you guessed it; this SRAM can be the on chip CPU RAM that it needs for a PS3 BC if there was any plan of doing it. Unified memory probably would not work in hardware BC where the original console had split config. so partially it makes sense, ofc this is speculation.

Third, and this is the most possible among these, related to SFS it holds the most current virtual asset IDs for better utilization of the RAM pool and keeps from unnecessarily streaming from SSD, it is most likely that these work in tandem with new caches placed in the GPU and the scrubbers that work to partially evict these caches once they are invalidated from the list resident and live updating in the SRAM.

EDIT: So there are some people confusing SRAM in the Main SoC and the SRAM in the Custom Flash Controller chip, I will copy one of my responses here for further reading.
From the SSD patent: http://www.freepatentsonline.com/y2017/0097897.html

"A plurality of NAND flash memories are connected to the flash memory 20. Data is stored in a distributed manner in a plurality of channels (four channels from “ch0” to “ch3” in FIG. 1) as illustrated. The flash controller 18 includes a host controller 22, a memory controller 28, and an SRAM (Static Random Access Memory) 24."

"Thus, storing a sufficiently small-sized address conversion table in the SRAM 24 of the flash controller 18 makes it possible to convert addresses without the mediation of an external DRAM."

Fig. 4 at http://www.freepatentsonline.com/20170097897.pdf
That unit is 'Custom Flash Controller' pictured here
vtnIX6szoKolnDAp.jpg


>>> There is SRAM in that Unit AS WELL AS a different SRAM in the Main SoC that has different purpose. NAND chips require RAM very close at hand and SRAM that is inside the 'Custom Flash Controller' provides that. eSRAM that is inside the SoC is comparatively far away, and it is embedded right on the die of SoC which has different purpose.

The SRAM mentioned in the patent refers to one that is inside 'Custom Flash Controller' Unit. So there is SRAM in the Main Chip - SoC and there is ALSO another SRAM on the Custom Flash Controller, mainly for residing lookup tables, do not mix the two just because the names are the same, SRAM. The one inside the SoC is actually eSRAM as in embedded SRAM that has different purpose than arbitration of physical address space of game install/save file locations etc.
 
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L4 cache is the embedded SRAM on the SoC. Most people probably overlooked this bit, or simply do not know what it means, but it is a static RAM that is closer to SoC than the main system 16GB GDDR6 RAM (and thus has even less latency, perfect for streaming related stuff). Don't know its size however I can speculate it is around 32-64MB. You guys probably still remember Xbox One's 32MB eSRAM that was right on the chip which was made to close the gap for their use of DDR3 RAM as main system memory instead of GDDR5. This time however, PS5 has plentiful main system RAM with good BW and really (REALLY) high bandwidth NAND chips for storage, so it is hard for me to say PS5's usage of eSRAM as it doesn't need it to increase BW but a special purpose. It takes up precious die space so the reason of its existence must be really important but don't know why people simply overlooked it. I thought it was a well known feature of PS5, certainly since it was really badly implemented in Xbox One as a stop gap for their glaring BW deficit.

Well I can speculate a few use cases:
First, Tempest Audio is configured as RAMless DMA engine so if it requires memory pointers, SRAM is closest and probably one with least latency being on the same chip.

Second, is still related to Tempest however not for audio solution for PS5 games but for BC. I think TE which is described as SPU like chip can behave like CELL for PS3, RSX is GPU portion with its own GDDR6 RAM, however you guys must remember PS3 had split memory configuration where it's GPU - RSX had its own memory and its CPU - CELL also had its own, well you guessed it; this SRAM can be the on chip CPU RAM that it needs for a PS3 BC if there was any plan of doing it. Unified memory probably would not work in hardware BC where the original console had split config. so partially it makes sense, ofc this is speculation.

Third, and this is the most possible among these, related to SFS it holds the most current virtual asset IDs for better utilization of the RAM pool and keeps from unnecessarily streaming from SSD, it is most likely that these work in tandem with new caches placed in the GPU and the scrubbers that work to partially evict these caches once they are invalidated from the list resident and live updating in the SRAM.

Ray tracing performance might be improved with a large L4 cache, provided the data structure is designed around it.
 
L4 cache is the embedded SRAM on the SoC. Most people probably overlooked this bit, or simply do not know what it means, but it is a static RAM that is closer to SoC than the main system 16GB GDDR6 RAM (and thus has even less latency, perfect for streaming related stuff). Don't know its size however I can speculate it is around 32-64MB. You guys probably still remember Xbox One's 32MB eSRAM that was right on the chip which was made to close the gap for their use of DDR3 RAM as main system memory instead of GDDR5. This time however, PS5 has plentiful main system RAM with good BW and really (REALLY) high bandwidth NAND chips for storage, so it is hard for me to say PS5's usage of eSRAM as it doesn't need it to increase BW but a special purpose. It takes up precious die space so the reason of its existence must be really important but don't know why people simply overlooked it. I thought it was a well known feature of PS5, certainly since it was really badly implemented in Xbox One as a stop gap for their glaring BW deficit.

Well I can speculate a few use cases:
First, Tempest Audio is configured as RAMless DMA engine so if it requires memory pointers, SRAM is closest and probably one with least latency being on the same chip.

Second, is still related to Tempest however not for audio solution for PS5 games but for BC. I think TE which is described as SPU like chip can behave like CELL for PS3, RSX is GPU portion with its own GDDR6 RAM, however you guys must remember PS3 had split memory configuration where it's GPU - RSX had its own memory and its CPU - CELL also had its own, well you guessed it; this SRAM can be the on chip CPU RAM that it needs for a PS3 BC if there was any plan of doing it. Unified memory probably would not work in hardware BC where the original console had split config. so partially it makes sense, ofc this is speculation.

Third, and this is the most possible among these, related to SFS it holds the most current virtual asset IDs for better utilization of the RAM pool and keeps from unnecessarily streaming from SSD, it is most likely that these work in tandem with new caches placed in the GPU and the scrubbers that work to partially evict these caches once they are invalidated from the list resident and live updating in the SRAM.

They include the SRAM in the I/O so I definitely think it has something to do with the I/O. But your other theories about how it would work with Tempest and for BC are also really interesting.

I think it's safe to say that the SRAMs presence shouldn't be seen as a bad thing in this case. However you are right that it does take up alot of space on the die. I hope it's worth it.

Imt98hhiGyx2HAQx.jpg


For comparisons sake this is how much space the SRAM takes up on the XB1s APU.

XB1SOC-2.jpg
 
Ray tracing performance might be improved with a large L4 cache, provided the data structure is designed around it.
Ahh yes haven't thought about RT at all but you are right. BVH traversal is extremely memory intensive so like you said, if it is large enough it can do all of those calculations within the SoC itself without having to go to RAM and using any system memory BW at all. And this actually makes it the most important use case of all, more important than my speculations I think. So for RT a resident RAM within the I/O complex makes the perfect sense. I think this is really it.
 

roops67

Member
........You guys probably still remember Xbox One's 32MB eSRAM that was right on the chip which was made to close the gap for their use of DDR3 RAM as main system memory instead of GDDR5...........certainly since it was really badly implemented in Xbox One as a stop gap for their glaring BW deficit.......
(Sorry edited your post to the relevant subject I'm referring to...)
They used EDRAM in the X360, used same philosophy for X1 but it wasn't good. So they dumped it and copied PS4's philosophy for the X1X (unified ram, HSA). Microsoft the COPYCATS, it ain't the first time! And they never give credit where credit is due
 
[snip]
For comparisons sake this is how much space the SRAM takes up on the XB1s APU.

XB1SOC-2.jpg
That is 32 MB of embedded SRAM on Xbox One SoC. As you can see it is divided into two chunks of 16MBs. Those are as big as 14 Xbox One AMD GCN Compute Units. It was the main reason why Xbox could only fit in 14 GCN CUs into the SoC and thus much less powerful in terms of TFLOPs.

Now for PS5 it is completely different. 2TF power deficit and fitting just 36 RDNA2 CUs (which are around 60% larger than PS4 GCN CUs) is only making 18% difference AND that is with fitting SRAM into the SoC along with everything I/O related.

With these in mind, I think PS5 SoC die size is not smaller than XSX SoC, it is either very close, or actually as I suspect more and more it is really bigger than it. The secrecy surrounding the teardown and the fact that we haven't seen not even an engineering sample leak images or any kind of digital render of the SoC in any promotional materials really gives credence to the speculation that PS5 actually has a bigger die than XSX.
 
They include the SRAM in the I/O so I definitely think it has something to do with the I/O. But your other theories about how it would work with Tempest and for BC are also really interesting.

I think it's safe to say that the SRAMs presence shouldn't be seen as a bad thing in this case. However you are right that it does take up alot of space on the die. I hope it's worth it.

Imt98hhiGyx2HAQx.jpg


For comparisons sake this is how much space the SRAM takes up on the XB1s APU.

XB1SOC-2.jpg

It seems possible that a sizable cache (e.g. 1 GB) could be printed at a larger process node, and then stacked onto the APU, so its added costs (area & otherwise) would not be directly comparable to the die you are referencing.
 
That is 32 MB of embedded SRAM on Xbox One SoC. As you can see it is divided into two chunks of 16MBs. Those are as big as 14 Xbox One AMD GCN Compute Units. It was the main reason why Xbox could only fit in 14 GCN CUs into the SoC and thus much less powerful in terms of TFLOPs.

Now for PS5 it is completely different. 2TF power deficit and fitting just 36 RDNA2 CUs (which are around 60% larger than PS4 GCN CUs) is only making 18% difference AND that is with fitting SRAM into the SoC along with everything I/O related.

With these in mind, I think PS5 SoC die size is not smaller than XSX SoC, it is either very close, or actually as I suspect more and more it is really bigger than it. The secrecy surrounding the teardown and the fact that we haven't seen not even an engineering sample leak images or any kind of digital render of the SoC in any promotional materials really gives credence to the speculation that PS5 actually has a bigger die than XSX.

It is even possible that the PS5’s SoC could be made up of chiplets for higher yields, say one each for I/O, GPU, CPU, and cache. It would be pretty cutting edge if true, but who knows?
 

Entroyp

Member
L4 cache is the embedded SRAM on the SoC. Most people probably overlooked this bit, or simply do not know what it means, but it is a static RAM that is closer to SoC than the main system 16GB GDDR6 RAM (and thus has even less latency, perfect for streaming related stuff). Don't know its size however I can speculate it is around 32-64MB. You guys probably still remember Xbox One's 32MB eSRAM that was right on the chip which was made to close the gap for their use of DDR3 RAM as main system memory instead of GDDR5. This time however, PS5 has plentiful main system RAM with good BW and really (REALLY) high bandwidth NAND chips for storage, so it is hard for me to say PS5's usage of eSRAM as it doesn't need it to increase BW but a special purpose. It takes up precious die space so the reason of its existence must be really important but don't know why people simply overlooked it. I thought it was a well known feature of PS5, certainly since it was really badly implemented in Xbox One as a stop gap for their glaring BW deficit.

Well I can speculate a few use cases:
First, Tempest Audio is configured as RAMless DMA engine so if it requires memory pointers, SRAM is closest and probably one with least latency being on the same chip.

Second, is still related to Tempest however not for audio solution for PS5 games but for BC. I think TE which is described as SPU like chip can behave like CELL for PS3, RSX is GPU portion with its own GDDR6 RAM, however you guys must remember PS3 had split memory configuration where it's GPU - RSX had its own memory and its CPU - CELL also had its own, well you guessed it; this SRAM can be the on chip CPU RAM that it needs for a PS3 BC if there was any plan of doing it. Unified memory probably would not work in hardware BC where the original console had split config. so partially it makes sense, ofc this is speculation.

Third, and this is the most possible among these, related to SFS it holds the most current virtual asset IDs for better utilization of the RAM pool and keeps from unnecessarily streaming from SSD, it is most likely that these work in tandem with new caches placed in the GPU and the scrubbers that work to partially evict these caches once they are invalidated from the list resident and live updating in the SRAM.

Zen 2 doesn’t have L4 cache, and while we don’t know if RDNA 2 might have it RDNA 1 didn’t even had L3. So, it’s weird that this came out of nowhere.
 
It is even possible that the PS5’s SoC could be made up of chiplets for higher yields, say one each for I/O, GPU, CPU, and cache. It would be pretty cutting edge if true, but who knows?
That is entirely possible. In the presentation It is called 'Main Custom Chip' not APU not SoC, maybe there really is something there. With all the secrecy that Sony is taking it to the limits this time around with NDAs, I suspect something really woderous and strange is on the horizon.
Zen 2 doesn’t have L4 cache, and while we don’t know if RDNA 2 might have it RDNA 1 didn’t even had L3. So, it’s weird that this came out of nowhere.
Yeah. Basically those PS5 specific GPU caches (that Cerny made a point of having just for them) are now their RDNA2 L3 caches, and this SRAM in the I/O complex is their L4. Things are getting weirder and weirder in terms of specialization that this freaking thing has.
 

Sinthor

Gold Member
I presume you are correct about them needing to double the number of modules, as I couldn't find a GDDR6 solution for 4GB modules on Samsung's website - so unless it was a bleeding edge new product that isn't available - so it looks like 2GB with two lots of 8 would be the only option as you said.

I agree that 32GB isn't needed-needed, but if they could get 32GB in at this point it would more than double the IO complex effectiveness IMHO.

I think they'd be better off and it would be less costly as well to simply increase the bandwidth to what they originally planned it to be. Think that takes higher speed memory modules if I recall correctly? THAT wouldn't add much to the cost of the console and with the I/O advantage the PS5 has, having higher memory bandwidth for their full, unified pool of memory would probably be of more benefit than just upping to 32GB RAM. Would affect power consumption and all of that less as well. That's my realistic wish list, anyway. Then again, we still don't know that the PS5 will be held back by memory bandwidth AT ALL. Maybe it won't!
 

Sinthor

Gold Member
Why call your third console "One", or "SAD"? They just don't make sense.

Eh, I don't think it's NECESSARILY that they will have other models, etc. Instead I think it's more marketing-speak. Kind of like calling your product the "wingding X Ultra Pro," or "wingding Elite." Gives them room to make the next generation the 'series XL' or 'series XX' or something like that.
 
If anything Sony would increase the RAM chips speed from 14 to 16 gbs if they thought it was necessary. With streaming they dont need more RAM.
But I think if the situation was other both companies will prefer to have more memory RAM but the GDDR6 is ridiculous expensive and yes that new
SSD approach will be an excellent way to ignore in some degree this (one side more than other).

In 4 or 5 years maybe the PC gamers will say that now is the "poor" quantity of memory ram which is lacking the PC but well maybe the the PS5 pro
and the XSXX (I still thinking that name is disaster for marketing) will improve this again.
 
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But I think if the situation was other both companies will prefer to have more memory RAM but the GDDR6 is ridiculous expensive and yes that new
SSD approach will be an excellent way to ignore in some degree this (one side more than other).

In 4 or 5 years maybe the PC gamers will say that now is the "poor" quantity of memory ram which is lacking the PC but well maybe the the PS5 pro
and the XSXX (I still thinking that name is disaster for marketing) will improve this again.

It boggles the mind why that name was chosen; I find it gets confusing every time it comes up in conversation. I have no idea how the mass market will react to it though. Maybe MS tested it out with a neophyte focus group and they had no problem at all?
 

Captain Hero

The Spoiler Soldier


Not sure how true this is but it won’t surprise me.


Well .. even if XSX has a loading screen that doesn’t make it worse you know .. having a super SSD won’t bury the Xbox !
people underestimate XSX Tech and power , yet all we heard is just words from the both sides .
 

Shmunter

Member


Not sure how true this is but it won’t surprise me.

Hopefully it's as simple as dumbing down the fidelity & variety of assets without any change to the core game. No probs scaling the veneer, but if things need to be re-coded and re-engineered; that will be a much bigger issue to deal with, and likely a lowest common denominator approach will win to save on time & cost.
 
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bitbydeath

Gold Member
There won’t be any cross play as ps5 gamers would have started their level before Xbox ones would still be waiting. Devs like cd projekt red and rockstar will ensure ssd parity imo.

We get the same thing now with varying internet speeds. Everyone just waits in a lobby until everyone is good to go.
 

FeiRR

Banned
We get the same thing now with varying internet speeds. Everyone just waits in a lobby until everyone is good to go.
That's not how it works. Lobbies are a way to populate a match, not to even up connections. Decreasing asset quality is a way to deal with such differences.
 
D

Deleted member 775630

Unconfirmed Member
But that already happen with DF and Evans I don't know if you are expecting another so they can show is secret chip or what which doesn't exist.

The only thing missing is deep dive in August, the only hardware presentation missing could be if the reveal XSS that's all.
No I'm not expecting secret sauce, I just expect a June event about next gen Xbox. Can be XSX and XSS, we'll see.
 

3liteDragon

Member
Ahh yes haven't thought about RT at all but you are right. BVH traversal is extremely memory intensive so like you said, if it is large enough it can do all of those calculations within the SoC itself without having to go to RAM and using any system memory BW at all. And this actually makes it the most important use case of all, more important than my speculations I think. So for RT a resident RAM within the I/O complex makes the perfect sense. I think this is really it.
Just leaving this here. (Timestamped)




“Modest costs.”
 
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Zzpaff

Member
I am amused to see how the organized band that feeds Microsoft (in tweeter) seems to have stopped selling its teraflops and other "virtues", to focus now only on Sony, you have to understand them, it must be difficult to realize that You have been playing the game since December and you have never had the ball.
 
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