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Next-Gen PS5 & XSX |OT| Console tEch threaD

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R600

Banned
Update: We might not be fucked boys
We are not fucked, we are just going safetly towards 320mm² die size lol

that's with a 256bit bus
And that is what Sony is going for. I think MS will go for 320bit bus, so around 16mm² additionally just on that. Probably with 14Gbps chips which would result in 560GB/s.
 
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SonGoku

Member
Moar sources to support my 7nm+ thesis:


It all adds up now, doesn't it? ;)
yep
Another one
N7+ has identical yield rates to N7 and will steadily improve, while also offering a 20% increase to transistor density. There’s also a 10% performance uplift or 15% power efficiency increase.
 

bitbydeath

Member
What’d I miss guys?

_yzhLMWcJm7nMn73adaJL2IDp_uNlpxreG9h-zfbIU1wrE_xf6NQZimI7NaaPSkpBNtf1kazJidaH5I9S-tIcqs9CsS1pJY1DM3r4R8=w340-h347-nc
 

R600

Banned
Moar sources to support my 7nm+ thesis:


It all adds up now, doesn't it? ;)
It all adds up to PS5 being 316-320mm² with 256 bit bus and 7nm EUV process lol
 

R600

Banned
40CUs its already there on plain 7nm lol
Barely I think, really pushing it IMO, but we'll see.

I am still of the opinion you will not see 400mm² die size. If its 7nm EUV, I think 316-320mm² from Sony with 256 bit bus and ~350mm² for MS with 8CUs more, lower clocks and 320bit bus.
 

R600

Banned
Another point I wanted to make, regarding Gonzalo is, at 36CUs (4 disabled), 1.8GHz is still rather high clock and judging by Navi 5700, these chips are TDP limited even at those clocks/CUs. For 7nm console 32CUs would be barely in system TDP limit if history is anything to go by, and that includes 360/PS3 gen.

Perhaps they can eek out ~100-150MHZ from 7nm EUV, because 7.9TF Navi is 185W GPU. 8.5-9TF is therefore my top prediction for next gen on 7nm+ node and I cant see them going above this. More CUs will (say 44 active) will result in higher TF but lower clocks will put it firmly around 9TF.

Double digit TF dream for next gen consoles is dead.
 
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SonGoku

Member
We'll place our bets. Mine are well known by now, so are yours, so lets see 😊
Sure
With 64ROPs falls around 330mm2 on 7nm+ on a 384 bit bus. Depending of ROP count a 64CU SoC will fall anywhere between 330-370mm2 with a 384 bit bus.
Might wanna keep that in mind for your prediction: 40CUs APU would fall in between 250-260mm2 on EUV
 
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pawel86ck

Banned
Another point I wanted to make, regarding Gonzalo is, at 36CUs (4 disabled), 1.8GHz is still rather high clock and judging by Navi 5700, these chips are TDP limited even at those clocks/CUs. For 7nm console 32CUs would be barely in system TDP limit if history is anything to go by, and that includes 360/PS3 gen.

Perhaps they can eek out ~100-150MHZ from 7nm EUV, because 7.9TF Navi is 185W GPU. 8.5-9TF is therefore my top prediction for next gen on 7nm+ node and I cant see them going above this. More CUs will (say 44 active) will result in higher TF but lower clocks will put it firmly around 9TF.

Double digit TF dream for next gen consoles is dead.
RX5700 GPU's are not out yet and you know already it will be a power hungry 185W beast. Yeah your calculations make sense and we can conclude SONY/MS/AMD sure dont know what they are doing, so we will not get even 8TF GPU because 40 CU chip at 1800MHz is still too high for a console. Most likely we will get 6TF like in xbox x just with better architecture because your TDP calculations clearly suggest consoles cant use GPU's with more TFLOPS even at 7nm. But maybe price will be very good, many people consider 500$ too expensive for a next gen console but at 350$ even poor people will be able to buy it and enjoy 1440p-1800p 30fps gaming experience for the next 10 years. People were hoping for 14TF beast yet we will get 6TF GPU 1.5 year from now, but at least there will be no loading times thanks to SDD😂😉.
 
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SonGoku

Member
Actually I made a mistake, a full 4SE setup with 128ROPs, 384 bit bus and 64CUs would take 363mm2 on 7nm EUV
A 72CU chip 379mm2
A 80CU chip 394mm2

These estimates are very conservative as consoles are likely to use different design rules that prioritize density over high clock speeds found in 5700 (empty spaces), so expect further 10-20mm2 deducted from each tier
 
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SonGoku

Member
i dont think mass production 6nm/7nm euv is gonna be ready by then..
Look negotiator posts earlier on this thread, he provided quite a few interesting links
I posted this earlier:
N7+ has identical yield rates to N7 and will steadily improve, while also offering a 20% increase to transistor density. There’s also a 10% performance uplift or 15% power efficiency increase.
 

TeamGhobad

Banned
Look negotiator posts earlier on this thread, he provided quite a few interesting links
I posted this earlier:

thats all dreamy and everything. but reality is something else. i think "standard" 7nm is a done deal. even the guy that went to intel said work on the chips was final.
 

SquireDalbridge

Neo Member
Reality Check Gentlemen!
Which Console is Much powerfull That's the only talk here?? Let us say even if MS Scarlett is More and More powerfull then PS5 if wont matter a Shiiiiiiiiit, Why?
Microsoft has only 343 Studio's which uses ingame engine The rest use Unreal Engine which Every 3 rate developer uses. So the games Will never show the Scarlett true Power Maybe 70 percent. Look at Epic games also using Unreal Engine. PS5 on the otherhand if even inferior I doubt thAt iT Will be equal in power. Will totally destroy MS Scarlett because PS5 games, the best games use Ingame engine look at Naughty dog Guerilla Studio's Sony own studios and more developers. Not thAt universally bland Unreal engine. So Scartlett may be this time more and More powerfull but we will never SEe then hardware actual Potential. Only 343 Studios. The Games are the ultimate Factor when showing the power of a Hardware and honestly Said ingame engines are better then MS 1000 developers using Unreal Engine While Sony first and second Party uses ingame engines. Remember The order 18.... Still better looking then Xbox Scarlett Halo
 
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R600

Banned
Might wanna keep that in mind so your prediction: 40CUs APU would fall in between 250-260mm2 on EUV
It wouldnt, and it wont.
What are your bets? Need to see them clearly in one post.
PS5

315 - 320mm² die
Zen2 3.2GHZ 8c/16t
Navi GPU HW RT - 36CU@1.8GHZ(8.3TF)
16GB of GDDR6 256 bit bus - 512GB/s
6GB of DDR4
1TB SSD

Scarlett

340 - 380mm² die
Zen2 3.2GHZ 8c/16t
Navi GPU HW RT - 44CU@1.6GHZ (9TF)
16 - 20GB of GDDR6 320bit bus - 560GB/s
1TB SSD

You will ask why I went for better and bigger Scarlett. I think Scarlett video reveal showed few things :

1) Bigger die - anywhere from 340-380mm²
2) Showed 10 GDDR6 chips and 320bit bus. They were mixed chips, but 14Gbps speed (which was shown, can deliver 560GB/s).

Why I went with smaller PS5?

1) Because Gonzalo chip, that I am 99% is PS5 is clocked too high to be anything more then 36CU part (even that is pushing)
2) Because Sony has shown historical precedent to go for smaller die size every following generation (PS2 > PS3 > PS4 > PS4Pro)
3) Because I believe PCB OQA leak from May is absolute correct as it ties so well with all the above.

~22.4 x 14.1 die size = ~316mm²

256bit bus - smaller on die size, narrower, but with very fast RAM (faster then what MS showed) therefore plently od BW.

Separate DDR4 for SSD and cache (would go well with Sonys philosophy).

So that is my bet from everything I know.
 
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TeamGhobad

Banned
It does matter. If xbox is more powerful but priced the same it would even out the industry a lot more. instead of Sony outselling 2-1. if xbox is less powerful at the same price its gonna be a disaster.
 

Aceofspades

Banned
One thing to consider when comparing TF between GCN an RDNA (implying 25% gains used by AMD):

Xbox One: 1.3TF (GCN) = 1.04TF (RDNA)
PS4: 1.84TF (GCN) = 1.47TF (RDNA)
PS4 PRO: 4.2TF (GCN) = 3.3TF (RDNA)
Xbox One X: 6TF (GCN) = 4.8TF (RDNA)

Assumptions different leaks:
*PS5 : 12.9TF (GCN) = 10.32TF (RDNA)
**Scarlett: 12TF(GCN) = 9.6TF (RDNA)

*PS5 TF number was based on the multiple leaks hovering ~13TF kit.

**Scarlett number is based on multiple report that PS5 kit is running faster by 10-15%

When you look at it from this perspective, you see that next gen is actually getting sizable power upgrade over the last (Accounting for arch improvement found in RDNA)

I expect PS5 and Scarlet to be within~10% of each other TF wise. With either of them having the power advantage.

Edit: Reason of PS5 achieving higher clocks in smaller die size: HBM2

Just my prediction.
 
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SonGoku

Member
Meant to say his own calculatiobs are far to simplistic and optimistic IMO.
5700XT is 251mm2 Zen2 75 mm2 add an extra 10 mm2 for RT
Total: 336mm2 on plain 7nm

7nm EUV its a 20% reduction->336*0.8 = 268.8 mm2
That's a very rough estimate, console chips are more optimized and waste less space

Your "prediction" doesnt fit 7nm euv

A 7nm 400mm2 die would be 320mm2 on 7nm EUV
 
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R600

Banned
5700XT is 251mm2 Zen2 75 mm2 add an extra 10 mm2 for RT
Total: 336mm2 on plain 7nm

7nm EUV its a 20% reduction->336*0.8 = 268.8 mm2
That's a very rough estimate, console chips are more optimized and waste less space

Your "prediction" doesnt fit 7nm euv

A 7nm 400mm2 die would be 320mm2 on 7nm EUV
Can you do same for PS4 chip?

Here are parts :

Full Pitcairn (20CUs) - 212mm²
8 Jaguar cores - 25mm²

Easy - 237mm²!

Its 348mm²
 

Shmunter

Member
This thread is moving fast.

Personally I’d wish for ps5=Xbone2.

There would be peace in the galaxy, no sour grapes getting a worse version of a game, and devs would be able to maximise game tech with a clear baseline.

Failing that, I hope the ps5 is better for selfish reasons. :goog_halo:
 

SonGoku

Member
Full Pitcairn (20CUs) - 212mm²
8 Jaguar cores - 25mm²
Jaguar was 75nm
The 61mm remaining can be explained by extra gddr5 memory controllers (8 vs 2 chips) and ACEs (8 vs 2)
and as I've said a 7nm 400mm2 die would be 320mm2 on 7nm+ (20% reduction)
 
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R600

Banned
Jaguar was 75nm
The 61mm remaining can be explained by extra gddr5 memory controllers (8 vs 2 chips) and ACEs
and as I've said a 7nm 400mm2 die would be 320mm2 on 7nm+ (20% reduction)
No, no it isnt. 3.10mm² per core + cache. Check AMDs source.

3127707-5145560096-30467.jpg
 
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xool

Member
Samsung also offers 7nm EUV:

''

Supposedly this is the process that will be used for PS4 Super Slim (makes me wonder why they chose Samsung over TSMC, hmmm...)
Maybe that's why there's a rumor about a Super Slim PS4 APU (110mm2)? Same die size as a mobile SoC.

All I could find was the segmentnext.com/2019/04/22/playstation-4-super-slim-2019/ article based on a reddit, which doesn't seem to check out.

Is there more too this SS-PS4 leak ? (I bet they could go sub 100mm2 - maybe 85mm2 - there2 and half proper shrinks from 28 to 7nm)
 

IceManCat

Member
Sure
With 64ROPs falls around 330mm2 on 7nm+ on a 384 bit bus. Depending of ROP count a 64CU SoC will fall anywhere between 330-370mm2 with a 384 bit bus.
Might wanna keep that in mind for your prediction: 40CUs APU would fall in between 250-260mm2 on EUV


How many TF does this equal
 

R600

Banned
Thats just the core when you take into account the cache it add ups to 70mm2, im sure because i seen it parroted countess times on forums
Thats the problem, we are taking forum posts as absolute gospel and thinking AMD dont know how to manufacture their own chips so Sony and MS will do so much better (even if AMD does it actually).

Look, even with 70mm² (which it isnt), this is still far less for PS4 GPU + CPU combo (212mm² + 70mm²) then for PS5 one (251mm² + 75mm² + RT HW?).

So :

PS4 die size is 348mm².
CPU+GPU = 282mm² in worst case.

PS5 die size is
CPU+GPU without RT HW = 326mm²

So with RT ~ 340mm² only CPU/GPU.

384bit bus ~ 96mm²

IO - 36mm²

Die size 40CU/RT HW/Zen2/384 bit bus is whopping 458mm² on 7nm and around 280W of TDP.

So where are you guys getting those numbers I ask?
 

R600

Banned
Same with all the rumours really.
Not with all.

1) 13TF Navi would be gigantic
2) It would suck ~300W
3) It would be faster then 2080, perhaps matching 2080TI
4) No one would be able to know target specs and die sizes. This is not something that is provided to devs, you can be sure of it.

Not one thing about it makes any sense whtsoever.

So, someone from Era or Gaf went there, posted it and now enjoys people gushing over it.
 
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bitbydeath

Member
Not with all.

1) 13TF Navi would be gigantic
2) It would suck ~300W
3) It would be faster then 2080, perhaps matching 2080TI
4) No one would be able to know target specs and die sizes. This is not something that is provided to devs, you can be sure of it.

Not one thing about it makes any sense whtsoever.

So, someone from Era or Gaf went there, posted it and now enjoys people gushing over it.

All, even the Gonzalo speculation could be fabricated. (And most likely is given tests were run in a Windows environment and not the native Linux environment where it resides.) We won’t know anything for sure until Sony and MS formally announce it.
 

SonGoku

Member
Thats the problem, we are taking forum posts as absolute gospel
lol ok dude, just yesterday you were telling me how much forum hw decoders mattered
Its not some bs, anyone with basic CPU knowledge can tell you cores are the smallest part of the package. When you factor in the cache and other transistors it adds up to 70mm2. Im sure someone will verify this
and thinking AMD dont know how to manufacture their own chips so Sony and MS will do so much better (even if AMD does it actually)
When did i ever say or imply this?
Look, even with 70mm² (which it isnt), this is still far less for PS4 GPU + CPU combo (212mm² + 70mm²)
66mm2 can easily be explained by extra gddr5 memory controllers (8 vs 2 chips) and ACEs (8 vs 2)
PS5 one (251mm² + 75mm² + RT HW?).
So you think RT will take 74 mm2?
For the record 5700 40CUs are 90mm2
That would be one hell of a RT core 82% space
So where are you guys getting those numbers I ask?
4d900c.png
 
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R600

Banned
All, even the Gonzalo speculation could be fabricated. (And most likely is given tests were run in a Windows environment and not the native Linux environment where it resides.) We won’t know anything for sure until Sony and MS formally announce it.
All can be fabricated, but Gonzalo type of leaks we get by no nonsense guys who dig through benchmark/codename databases.

Rumors like "OMG 450mm² die size with 14TF Navi and GTAVI launch title!!! Btw my dad works at Nintendo" are terrible. They are not even rumors. They fly in the face of everything we know about 7nm node, Zen2 and Navi die sizes and TDP.
 
One thing to consider when comparing TF between GCN an RDNA (implying 25% gains used by AMD):

Xbox One: 1.3TF (GCN) = 1.04TF (RDNA)
PS4: 1.84TF (GCN) = 1.47TF (RDNA)
PS4 PRO: 4.2TF (GCN) = 3.3TF (RDNA)
Xbox One X: 6TF (GCN) = 4.8TF (RDNA)

Assumptions different leaks:
*PS5 : 12.9TF (GCN) = 10.32TF (RDNA)
**Scarlett: 12TF(GCN) = 9.6TF (RDNA)

*PS5 TF number was based on the multiple leaks hovering ~13TF kit.

**Scarlett number is based on multiple report that PS5 kit is running faster by 10-15%

When you look at it from this perspective, you see that next gen is actually getting sizable power upgrade over the last (Accounting for arch improvement found in RDNA)

I expect PS5 and Scarlet to be within~10% of each other TF wise. With either of them having the power advantage.

Edit: Reason of PS5 achieving higher clocks in smaller die size: HBM2

Just my prediction.
The difference will most likely be between 8.5-9.5TF. These numbers alone pull it ahead of Stadia. I don't see where 8.5-9.5 wont be impressive considering that these machines are not gaming PC's and are geared towards gaming down to the metal. We started last gen at 1.4TF / 1.8TF and the games looked great. The Pro and X versions of the games simply gave them better resolutions and added a few effects, but the Jaguar and GCN tech held it back significantly. We are now 5 generations of CPU / GPU technology ahead with more efficient technology. These new consoles will be beasts even if they don't hit the 12TF mark like everyone is expecting.
 
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R600

Banned
Songoku, please re read my post and calculate everything again, you are missing the point. And point is :

PS4 die size = 348mm²
PS4 CPU + GPU = 70 + 212 (282mm²)
66mm² remaining is IO / 256 bit bus

PS5 die size = ???
PS5 CPU + GPU(40CU) = 75 + 251 + ~10RT (336mm²)
IO + 256 bit bus = 38mm² + 64mm² (102mm²)

So by my calculations ~ 438mm² for 40CU part if we follow PS4 die size dimensions.

Boy oh boy will some people turn out disappointed.
 

vpance

Member
I expect PS5 and Scarlet to be within~10% of each other TF wise. With either of them having the power advantage.

Edit: Reason of PS5 achieving higher clocks in smaller die size: HBM2

Just my prediction.

I'm expecting at least 15-20% difference with HBM2 space savings as the main factor. PS5 could fit at least 10 more CU because of it.
 
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