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(*)So it appears, that AMD RT performance is bound to CUs...

What are you talking about? Where was I wrong?
Nah, you were right about 9 tflops. i was wrong.

you were wrong about 1080 level performance but thats close enough to 9 tflops in numbers so i will let that slide.

i was talking about virtually every other verified insider beside you. odium, osiris, heisenberg, BGs, klee and of course the non vetted bu allowed to shit up the forum for months Tommy Fisher.

you and timdog were right.
 
They obviously cannot.
Amount of bullshit flying here on Gaf about RT is astonishing.

Unless you are indicating that you know the internals of the PS5 SM cores, why are you assuming that the PS5/XSX have the same architecture as Turing? I consider true hardware accelerated raytracing to mean actual physical cores that do nothing but ray intersections. We haven't seen any of the hardware spec pictures showing the next-gen chipsets to make those kinds of claims.
 
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Unless you are indicating that you know the internals of the PS5 SM cores, why are you assuming that the PS5/XSX have the same architecture as Turing? I consider true hardware accelerated raytracing to mean actual physical cores that do nothing but ray intersections. We haven't seen any of the hardware spec pictures showing the next-gen chipsets to make those kinds of claims.

There is no magic.
We do know that Turing has nothing but the same ray-tri/ray-aabb intersection fixed logic. And also some more caches to support ray coherency hashing.
So far it seems like AMD does exactly that.
All that RT talk was beaten to death in PS3 era. Nothing changed since then.
It all bottlenecks on memory access (which Cerny explicitly mentioned today).
No magical solutions. Sorry.
In the end actual intersections per second are pretty low for 2080Ti level hardware: around 3-3.5bln/sec for synthetic benchmarks.
So for that level of actual performance it's a gimmick... for me at least.

P.S. I really hope that Ampere will do something. But my hopes are not high.
I think I've already said that we need tiled architecture exposed, in APIs, to make a way forward IMHO. But NV is too afraid to open it up.
 
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Ehm.... Cerny did not talk about using only global illumination. Who is this RoGuy?? I think he didn't even see the presentation!
He even said he feels optimistic since he saw realtime reflections running in complex scenes with minimum performance impact.
It's in that picture, in the OP.
 
Xbox trolls: we have Minecraft with better everything on XBOX. So hardcore. Take that Playstation!

The rest of the world:.... ...... ..... ....... .......what's Minecraft again? ...... ..... ......What is a XBOX?...... ....... Never mind.
 
That cutted picture, where the various options for raytracing are listed. But you only saw part of it!
ETaGfjWWkAA-RyL

You are right.

Xbox trolls: we have Minecraft with better everything on XBOX. So hardcore. Take that Playstation!

The rest of the world:.... ...... ..... ....... .......what's Minecraft again? ...... ..... ......What is a XBOX?...... ....... Never mind.
What's your point?
 
You're my favorite troll on this forum. It's so blindingly obvious all of the time yet so many people fall for it :messenger_tears_of_joy:
Yeah well, I did not initially know who I am replying to, lesson learned.

Well better put, I just hit reply and send...and oh well MHK : D

Edit: Why I am still laughing on that gif you posted about GDC, it's riduculously fitting, would be nice if you would work at MS : D
 
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Unless you are indicating that you know the internals of the PS5 SM cores, why are you assuming that the PS5/XSX have the same architecture as Turing? I consider true hardware accelerated raytracing to mean actual physical cores that do nothing but ray intersections. We haven't seen any of the hardware spec pictures showing the next-gen chipsets to make those kinds of claims.
Stop spreading misinformation. RT is done the same way across Nvidia and now AMD. There is no separate raytracing unit, they have fixed ray intersection acceleration logic blocks within each SM (Nvidia) or CU (AMD).
 
Stop spreading misinformation. RT is done the same way across Nvidia and now AMD. There is no separate raytracing unit, they have fixed ray intersection acceleration logic blocks within each SM (Nvidia) or CU (AMD).
Then why is Turing across the whole range of power so big?
 
There is no magic.
We do know that Turing has nothing but the same ray-tri/ray-aabb intersection fixed logic. And also some more caches to support ray coherency hashing.
So far it seems like AMD does exactly that.
All that RT talk was beaten to death in PS3 era. Nothing changed since then.
It all bottlenecks on memory access (which Cerny explicitly mentioned today).
No magical solutions. Sorry.
In the end actual intersections per second are pretty low for 2080Ti level hardware: around 3-3.5bln/sec for synthetic benchmarks.
So for that level of actual performance it's a gimmick... for me at least.

P.S. I really hope that Ampere will do something. But my hopes are not high.
I think I've already said that we need tiled architecture exposed, in APIs, to make a way forward IMHO. But NV is too afraid to open it up.

Understood, but you still didn't tell me you have seen what the RDNA 2.0 chipsets do. I need to read the whitepaper before I reserve judgement - and that's not out yet.
 
Its probably closer bound to the overall teraflops as its frequency is likely a multiple or the same as the core clock. So XSX will be ~20% faster.
 
Stop spreading misinformation. RT is done the same way across Nvidia and now AMD. There is no separate raytracing unit, they have fixed ray intersection acceleration logic blocks within each SM (Nvidia) or CU (AMD).

I'll read Nvidia's whitepaper. But until I read AMDs, I'm going to be skeptical.
 
CUs are constant frequency is not in Sony's case.

They did say they will be at the top one most of the time so that's what I'm using :p. To say that the XSX will be 40% faster is shows a misunderstanding about how the technology works.
 
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This is shaping up to be a real annihilation from MS. Those 1st party games from MS are going to look absolutely insane as they have more raw power to work with and more RT ability as well. Sony stumbled so badly for next generation, they should have taken their sweet time with PS5.
But how long are they going to support the Xbox one with those 1st party games and who are their 1st party developers for this generation? Also what about the much lower powered Lockhart being there throughout?
 
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I personally prefer a faster SSD and superior audio, but the Xbox Series X needs to be commended for producing possibly the most powerful gaming console in history.
They're important but not crucial to a gamer's experience if it's already locked at 60FPS.

If I wanted better graphics and framerates, I would invest in a PC.

Console gaming is more different and unique than just graphics and framerates. There's other factors that comes to play, and lets not forget the controller innovations that come with the PS5 too.

This is just the beginning, but so far, Xbox Series X won the power battle.
It's not going to be at the level of the Tempest Engine though.
🤦‍♂️I really wanna slap you right now :messenger_grinning_squinting:
 
Either way we are not going to have fully path-traced complex (ie not just quake 2 and minecraft) games until PS6 and whatever the XBOX after XSX will be called.
 
Then why is Turing across the whole range of power so big?

Die size wise turning is bigger because its still on 10nm and AMD is on 7nm.
Transistor wise turning doesn't reuse any part of the GPU for raytracing where as AMD uses the TMU caches as RT caches afaik.
 
But how long are they going to support the Xbox one with those 1st party games and who are their 1st party developers for this generation?

Well we know 1st and 3rd party developers have this generation already made customized patches to unlock games potential as was the case with the XOX so I don't see it being any different for next gen. CDPR already came out with supporting the transition from having a current generation game that can be carried over to next gen with out a hick up.

We have truly stepped into the PC verse where scalable graphics and performances are just part of the ecosystem. PS isn't going to abandon all 100Mil+ of its user base for next gen either so the scalabity between current gen and next gen will be with use for the first couple of years like Phil has already said.
 
Raytracing is a gimmick in its current state, maybe 3-5 years later... when new versions of these consoles come it might have a relevance. Lots of devs won't even use it.

Nah bro, ray tracing is here to stay and will only get more and more use.
Now that we have a base line in consoles devs will be even more enthusiastic about using it, it's gonna get pushed hard in marketing cause it makes such a noticeable difference.
 
Stop spreading misinformation. RT is done the same way across Nvidia and now AMD. There is no separate raytracing unit, they have fixed ray intersection acceleration logic blocks within each SM (Nvidia) or CU (AMD).

Here is software based RT vs. hardware based RT taken from Nvidia's own whitepaper

NfG53dP.png


The ray intersection acceleration blocks in this diagram represent "cores" (i.e. physical silicon just like the FP32 and INT32 and Tensor Cores.). I am taking that to mean actual hardware. I'm not talking about CUDA registers (which a GPU has many).

Can you point out to me with either an API example of using the "logic blocks" in the Turing GPU? Also, can you point me to the equivalent AMD spec whitepaper?
 
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Die size wise turning is bigger because its still on 10nm and AMD is on 7nm.
Transistor wise turning doesn't reuse any part of the GPU for raytracing where as AMD uses the TMU caches as RT caches afaik.
So possible bottleneck againts nVidia?
 
Like in transistor count, die size.
Oh right. Nvidia kind of unified their GPU lines now and they pack a whole bunch of new features compared to older architecture, features that used tio be exclusive to enterprise lines are now part of gaming line of GPUs, while still staying on the same node.
 
Nah bro, ray tracing is here to stay and will only get more and more use.
Now that we have a base line in consoles devs will be even more enthusiastic about using it, it's gonna get pushed hard in marketing cause it makes such a noticeable difference.
We still need a lot more rays/s than what even the 2080Ti can put out in order to have serious ray-tracing and path-tracing.
 
I'll be honest, this is kind of a big deal to me as a PS4 owner. I'm really on the fence at the moment. Two key things, the game lineups as launch approaches, and the cost difference.
 
Can you point out to me with either an API example of using the "logic blocks" in the Turing GPU? Also, can you point me to the equivalent AMD spec whitepaper?

Look at Figure.4 you will see that RT core is colocated with Tex cores.
Each 4 TEX cores has one RT core.
According to this patent from AMD http://www.freepatentsonline.com/y2019/0197761.html
The "intersection engine" is colocated with texture cache and fetch units. I.e. exactly the same.
 
Look at Figure.4 you will see that RT core is colocated with Tex cores.
Each 4 TEX cores has one RT core.
According to this patent from AMD http://www.freepatentsonline.com/y2019/0197761.html
The "intersection engine" is colocated with texture cache and fetch units. I.e. exactly the same.

OK. That's good enough for me.

However, what Tripolygon Tripolygon said "There is no separate raytracing unit, they have fixed ray intersection acceleration logic blocks within each SM (Nvidia) or CU (AMD)." is a little misleading. There is RT hardware built into the SM. I interpreted his saying of "logic block" to mean no silicon and that's not the case.
 
Nah bro, ray tracing is here to stay and will only get more and more use.
Now that we have a base line in consoles devs will be even more enthusiastic about using it, it's gonna get pushed hard in marketing cause it makes such a noticeable difference.
Ray Tracing will not sell a game. It will be either used or not. Well, I don't think it matters. Games will get even more beautiful, hence less believable.
 
Here is software based RT vs. hardware based RT taken from Nvidia's own whitepaper


The ray intersection acceleration blocks in this diagram represent "cores" (i.e. physical silicon just like the FP32 and INT32 and Tensor Cores.). I am taking that to mean actual hardware. I'm not talking about CUDA registers (which a GPU has many).

Can you point out to me with either an API example of using the "logic blocks" in the Turing GPU? Also, can you point me to the equivalent AMD spec whitepaper?
And like i said, it is not a separate core that is outside the SM, it is part of the SM aka CU. This is similar to what AMD is doing, they have added new logic blocks which you refer to as "core" within each CU that does nothing but ray intersection acceleration.

Read their patent for it.

Edit.

OK. That's good enough for me.

However, what Tripolygon Tripolygon said "There is no separate raytracing unit, they have fixed ray intersection acceleration logic blocks within each SM (Nvidia) or CU (AMD)." is a little misleading. There is RT hardware built into the SM. I interpreted his saying of "logic block" to mean no silicon and that's not the case.
You misinterpreted me.
 
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And like i said, it is not a separate core that is outside the SM, it is part of the SM aka CU. This is similar to what AMD is doing, they have added new logic blocks which you refer to as "core" within each CU that does nothing but ray intersection acceleration.

Read their patent for it.

I read it. But I wasn't giving misinformation though. Just because it's a part of the SM doesn't make my definition false. x87 FPU has hardware registers in the x86.. I still count that as special hardware cores (they do have their own separate registers and commands).

Try not to be so harsh with the claims next time mate. (y)
 
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I read it. But I wasn't giving misinformation though. Just because it's a part of the SM doesn't make my definition false. x87 FPU has hardware registers in the x86.. I still count that as special hardware cores (they do have their own separate registers and commands).

Try not to be so harsh with the claims next time mate.
I'm being harsh because you have been repeating the same information that is false, mate.
Unless you are indicating that you know the internals of the PS5 SM cores, why are you assuming that the PS5/XSX have the same architecture as Turing? I consider true hardware accelerated raytracing to mean actual physical cores that do nothing but ray intersections. We haven't seen any of the hardware spec pictures showing the next-gen chipsets to make those kinds of claims.
You were under the impression that AMD does not employ fixed function logic block or cores that does nothing but ray intersection acceleration. Hence you keep banging on about true ray tracing. In the presentation given today by Cerny, he literally said that the CU has fixed function blocks that do ray intersection acceleration called the Intersection Engine. And would you look at that, its in the AMD patent.
f1bNvnx.jpg


 
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