I would assume a 20GB pool @560GB/s has more advantages, keep in mind split pool systems like PS3 & PC didn't share bandwidth, on the SEX configuration whenever CPU access the "slow pool" some cycles are wasted with the end result being more bandwidth used than its actually needed, the example given on ree was that for 48GB/s of CPU access it would take 80GB/s total bandwidth.
On top of that having a bigger pool of fast bandwidth would be more flexible and advantageous as a buffer that way devs would push the PS5 SSD harder to keep up.
Regardless of what they choose i'l be happy with a upgrade.
How are they getting to that number? Each GDDR6 chip provides 56 GB/s of bandwidth, right? So if the CPU only needs 1 GB of data, if it's on one chip, then 48 GB/s of CPU access would be able to be provided through one chip, right?
Unless I have that wrong, of course. That said I thought about the possibility if the amount of the slower memory bandwidth can be dynamically accessed, i.e if non-GPU processors like the CPU only need a small slice of the 336 GB/s bandwidth total, the system just gives as much as needed. For example if the CPU only needs 112 GB/s bandwidth, just two of the 2 GB chips are tapped for their bandwidth, while the others can still stay utilized by the GPU, which would include the 1 GB chips that are not given to the slower bandwidth pool.
Figure that should be possible, no reason to lock off six chips for slower bandwidth to something like the GPU on a given set of cycles when there could be many instances where the CPU only needs maybe one or two chips i.e very small amounts of that total slower bandwidth figure. Guess we need more info on how the memory setup works, but I picture that type of dynamic range to the slower pool would help somewhat with contention issues.
And I mean honestly, it's just a bit of an assumed conclusion; I've seen some people elsewhere seemingly think that when the non-GPU processors are accessing the memory, it "locks up" the six 2 GB chips altogether from GPU access regardless of what amount of memory and bandwidth those other processors need. That sounds like a dumb design decision oversight IMHO; would make more sense that the setup is those chips can access up to 336 GB/s bandwidth through the lower bound 1 GB portions of the six 2 GB chips, not that those chips are locked up as some sort of mode setting regardless of the amount needing to be requested.
As far as any upgrades, well if we don't hear anything about delays by sometime in June we can assume the systems are set for release this year. If anything gets announced for delays, it'll be before July IMHO. Just a gut feeling (plus usually that's about the time full production on the systems at mass scale begins I believe, for fall launches).