The IBM roadmap calls for a chip that basically reuses the same architecture (improved SPUs) by 2011 that's in the 1Tflop range. Which would be a bit better than 2x.
Reusing the architecture or something close to it doesn't really tell us anything about how powerful it will or won't be. It's a very scalable architecture.
I guess we'll wait and see. I hope their speculation is incorrect, and if it's not, that it doesn't signal a general trend for the industry.
Reusing the architecture or something close to it doesn't really tell us anything about how powerful it will or won't be. It's a very scalable architecture.
I guess we'll wait and see. I hope their speculation is incorrect, and if it's not, that it doesn't signal a general trend for the industry.